The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Dalam kertas ini, penindasan voltan teraruh pada papan pendawaian bercetak melalui pemuatan galangan dengan memasukkan peranti galangan seperti manik ferit difokuskan. Cara kesan penindasan berubah mengikut kedudukan sisipan peranti sedemikian turut disiasat. Simulasi medan elektromagnet digunakan untuk menentukan taburan voltan dan arus teraruh dalam pendawaian apabila papan pendawaian bercetak terdedah kepada medan elektromagnet luaran. Kemudian, berdasarkan pengagihan ini, simulasi medan elektromagnet telah dilakukan, dan eksperimen telah dijalankan untuk menyiasat hubungan antara kedudukan sisipan peranti impedans dan kesan penindasannya. Telah disahkan bahawa voltan teraruh boleh menjadi besar apabila ketidakpadanan berlaku antara galangan pada kedua-dua hujung pendawaian bercetak, dan bahawa kesan penindasan boleh berbeza dengan ketara mengikut tempat peranti galangan dimasukkan. Kesan besar diperoleh dengan memasukkan peranti galangan pada satu titik 1/4 panjang gelombang dalam jarak dari hujung wayar di mana voltan sedang teraruh. Di samping itu, membandingkan penggunaan perintang dengan penggunaan manik ferit cip sebagai peranti impedans mendedahkan kecenderungan yang sama dalam kedua-duanya. Tingkah laku di atas telah disahkan oleh analisis berangka.
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Salinan
Hidetoshi YAMAMOTO, Shinichi SHINOHARA, Risaburo SATO, "The Effect of Impedance Loading Position on Induced Voltage Suppression" in IEICE TRANSACTIONS on Communications,
vol. E83-B, no. 3, pp. 569-576, March 2000, doi: .
Abstract: In this paper, the suppression of induced voltage on a printed wiring board through impedance loading by inserting impedance devices such as ferrite beads is focused on. How the suppression effect changes according to the insertion position of such devices is also investigated. Electromagnetic-field simulations were used to determine the distribution of voltage and current induced in wiring when a printed wiring board is exposed to an external electromagnetic field. Then, on the basis of these distributions, electromagnetic-field simulations were performed, and experiments were conducted to investigate the relationship between the insertion position of impedance devices and their suppression effect. It was verified that induced voltage can be large when a mismatch occurs between the impedance at the two ends of printed wiring, and that the suppression effect can differ significantly according to where an impedance device is inserted. A large effect was obtained by inserting an impedance device at a point 1/4 wavelength in distance from the end of a wire where voltage is being induced. In addition, comparing the use of resistors with the use of chip ferrite beads as impedance devices revealed similar tendencies in both. The above behavior was confirmed by numerical analysis.
URL: https://global.ieice.org/en_transactions/communications/10.1587/e83-b_3_569/_p
Salinan
@ARTICLE{e83-b_3_569,
author={Hidetoshi YAMAMOTO, Shinichi SHINOHARA, Risaburo SATO, },
journal={IEICE TRANSACTIONS on Communications},
title={The Effect of Impedance Loading Position on Induced Voltage Suppression},
year={2000},
volume={E83-B},
number={3},
pages={569-576},
abstract={In this paper, the suppression of induced voltage on a printed wiring board through impedance loading by inserting impedance devices such as ferrite beads is focused on. How the suppression effect changes according to the insertion position of such devices is also investigated. Electromagnetic-field simulations were used to determine the distribution of voltage and current induced in wiring when a printed wiring board is exposed to an external electromagnetic field. Then, on the basis of these distributions, electromagnetic-field simulations were performed, and experiments were conducted to investigate the relationship between the insertion position of impedance devices and their suppression effect. It was verified that induced voltage can be large when a mismatch occurs between the impedance at the two ends of printed wiring, and that the suppression effect can differ significantly according to where an impedance device is inserted. A large effect was obtained by inserting an impedance device at a point 1/4 wavelength in distance from the end of a wire where voltage is being induced. In addition, comparing the use of resistors with the use of chip ferrite beads as impedance devices revealed similar tendencies in both. The above behavior was confirmed by numerical analysis.},
keywords={},
doi={},
ISSN={},
month={March},}
Salinan
TY - JOUR
TI - The Effect of Impedance Loading Position on Induced Voltage Suppression
T2 - IEICE TRANSACTIONS on Communications
SP - 569
EP - 576
AU - Hidetoshi YAMAMOTO
AU - Shinichi SHINOHARA
AU - Risaburo SATO
PY - 2000
DO -
JO - IEICE TRANSACTIONS on Communications
SN -
VL - E83-B
IS - 3
JA - IEICE TRANSACTIONS on Communications
Y1 - March 2000
AB - In this paper, the suppression of induced voltage on a printed wiring board through impedance loading by inserting impedance devices such as ferrite beads is focused on. How the suppression effect changes according to the insertion position of such devices is also investigated. Electromagnetic-field simulations were used to determine the distribution of voltage and current induced in wiring when a printed wiring board is exposed to an external electromagnetic field. Then, on the basis of these distributions, electromagnetic-field simulations were performed, and experiments were conducted to investigate the relationship between the insertion position of impedance devices and their suppression effect. It was verified that induced voltage can be large when a mismatch occurs between the impedance at the two ends of printed wiring, and that the suppression effect can differ significantly according to where an impedance device is inserted. A large effect was obtained by inserting an impedance device at a point 1/4 wavelength in distance from the end of a wire where voltage is being induced. In addition, comparing the use of resistors with the use of chip ferrite beads as impedance devices revealed similar tendencies in both. The above behavior was confirmed by numerical analysis.
ER -