The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Dalam rangkaian data berkelajuan tinggi, adalah penting untuk melaksanakan resolusi alamat berkelajuan tinggi untuk paket pada penghala. Untuk mencapai resolusi alamat berkelajuan tinggi, cache alamat berkesan. Untuk akses HTTP, telah dibincangkan bahawa Model Dual Zipfian boleh menerangkan pengedaran alamat IP destinasi, dan ia membolehkan kami memperoleh nisbah kehilangan cache dalam keadaan mantap, iaitu nisbah kehilangan cache apabila cache mempunyai entri penuh . Walau bagaimanapun, pada masa sistem dimulakan atau topologi rangkaian ditukar, cache alamat tidak mempunyai maklumat alamat atau maklumat alamat tidak sah. Kertas ini menunjukkan nisbah kehilangan wajib iaitu nisbah kehilangan cache apabila cache tidak mempunyai kemasukan alamat. Di samping itu, kami membincangkan dasar penggantian entri cache, untuk pemulihan pantas kebolehcapaian paket, apabila cache mempunyai maklumat alamat yang tidak boleh dicapai.
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Salinan
Masaki AIDA, Noriyuki TAKAHASHI, Michiyo MATSUDA, "Evaluation of Compulsory Miss Ratio for Address Cache and Replacement Policies for Restoring Packet Reachability" in IEICE TRANSACTIONS on Communications,
vol. E83-B, no. 7, pp. 1400-1408, July 2000, doi: .
Abstract: In high-speed data networks, it is important to execute high-speed address resolution for packets at a router. To accomplish high-speed address resolution, address cache is effective. For HTTP accesses, it has been discussed that the Dual Zipfian Model can describe the distribution of the destination IP addresses, and it enabled us to derive the cache miss ratio in the steady state, i. e. , the cache miss ratio when the cache has full entries. However, at the time that systems are initialized or network topology is changed, the address cache has no address information or invalid address information. This paper shows the compulsory miss ratio which is the cache miss ratio when the cache has no address entry. In addition, we discuss the replacement policies of cache entries, for fast recovery of packet reachability, when the cache has information of unreachable address.
URL: https://global.ieice.org/en_transactions/communications/10.1587/e83-b_7_1400/_p
Salinan
@ARTICLE{e83-b_7_1400,
author={Masaki AIDA, Noriyuki TAKAHASHI, Michiyo MATSUDA, },
journal={IEICE TRANSACTIONS on Communications},
title={Evaluation of Compulsory Miss Ratio for Address Cache and Replacement Policies for Restoring Packet Reachability},
year={2000},
volume={E83-B},
number={7},
pages={1400-1408},
abstract={In high-speed data networks, it is important to execute high-speed address resolution for packets at a router. To accomplish high-speed address resolution, address cache is effective. For HTTP accesses, it has been discussed that the Dual Zipfian Model can describe the distribution of the destination IP addresses, and it enabled us to derive the cache miss ratio in the steady state, i. e. , the cache miss ratio when the cache has full entries. However, at the time that systems are initialized or network topology is changed, the address cache has no address information or invalid address information. This paper shows the compulsory miss ratio which is the cache miss ratio when the cache has no address entry. In addition, we discuss the replacement policies of cache entries, for fast recovery of packet reachability, when the cache has information of unreachable address.},
keywords={},
doi={},
ISSN={},
month={July},}
Salinan
TY - JOUR
TI - Evaluation of Compulsory Miss Ratio for Address Cache and Replacement Policies for Restoring Packet Reachability
T2 - IEICE TRANSACTIONS on Communications
SP - 1400
EP - 1408
AU - Masaki AIDA
AU - Noriyuki TAKAHASHI
AU - Michiyo MATSUDA
PY - 2000
DO -
JO - IEICE TRANSACTIONS on Communications
SN -
VL - E83-B
IS - 7
JA - IEICE TRANSACTIONS on Communications
Y1 - July 2000
AB - In high-speed data networks, it is important to execute high-speed address resolution for packets at a router. To accomplish high-speed address resolution, address cache is effective. For HTTP accesses, it has been discussed that the Dual Zipfian Model can describe the distribution of the destination IP addresses, and it enabled us to derive the cache miss ratio in the steady state, i. e. , the cache miss ratio when the cache has full entries. However, at the time that systems are initialized or network topology is changed, the address cache has no address information or invalid address information. This paper shows the compulsory miss ratio which is the cache miss ratio when the cache has no address entry. In addition, we discuss the replacement policies of cache entries, for fast recovery of packet reachability, when the cache has information of unreachable address.
ER -