The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Sistem pensuisan ATM 640-Gbit/s eksperimen diterangkan. Sistem pensuisan boleh berskala dan seakan-akan tidak menyekat dan menggunakan penyusunan semula perkakasan sendiri dalam rangkaian tiga peringkat. Keputusan pelaksanaan perkakasan untuk sistem pensuisan dibentangkan. Sistem pensuisan direka menggunakan peranti CMOS 0.25-µm termaju, teknologi multi-cip-modul (MCM) berketumpatan tinggi dan teknologi interkoneksi panjang gelombang-division-multiplexing (WDM) optik. Modul pensuisan 80-Gbit/s boleh berskala direka bentuk dalam kombinasi dengan teknik timbang tara teragih berskala yang dibangunkan, dan sistem interkoneksi WDM yang menghubungkan berbilang modul pensuisan 80-Gbit/s dibangunkan. Menggunakan komponen ini, sistem pensuisan 640-Gbit/s percubaan sebahagiannya dibina. Sistem pensuisan 640-Gbit/s akan digunakan pada rangkaian ATM jalur lebar masa hadapan.
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Salinan
Naoaki YAMANAKA, Eiji OKI, Seisho YASUKAWA, Ryusuke KAWANO, Katsuhiko OKAZAKI, "OPTIMA: Scalable, Multi-Stage, 640-Gbit/s ATM Switching System Based on Advanced Electronic and Optical WDM Technologies" in IEICE TRANSACTIONS on Communications,
vol. E83-B, no. 7, pp. 1488-1496, July 2000, doi: .
Abstract: An experimental 640-Gbit/s ATM switching system is described. The switching system is scalable and quasi-non-blocking and uses hardware self-rearrangement in a three-stage network. Hardware implementation results for the switching system are presented. The switching system is fabricated using advanced 0.25-µm CMOS devices, high-density multi-chip-module (MCM) technology, and optical wavelength-division-multiplexing (WDM) interconnection technology. A scalable 80-Gbit/s switching module is fabricated in combination with a developed scalable-distributed-arbitration technique, and a WDM interconnection system that connects multiple 80-Gbit/s switching modules is developed. Using these components, an experimental 640-Gbit/s switching system is partially constructed. The 640-Gbit/s switching system will be applied to future broadband ATM networks.
URL: https://global.ieice.org/en_transactions/communications/10.1587/e83-b_7_1488/_p
Salinan
@ARTICLE{e83-b_7_1488,
author={Naoaki YAMANAKA, Eiji OKI, Seisho YASUKAWA, Ryusuke KAWANO, Katsuhiko OKAZAKI, },
journal={IEICE TRANSACTIONS on Communications},
title={OPTIMA: Scalable, Multi-Stage, 640-Gbit/s ATM Switching System Based on Advanced Electronic and Optical WDM Technologies},
year={2000},
volume={E83-B},
number={7},
pages={1488-1496},
abstract={An experimental 640-Gbit/s ATM switching system is described. The switching system is scalable and quasi-non-blocking and uses hardware self-rearrangement in a three-stage network. Hardware implementation results for the switching system are presented. The switching system is fabricated using advanced 0.25-µm CMOS devices, high-density multi-chip-module (MCM) technology, and optical wavelength-division-multiplexing (WDM) interconnection technology. A scalable 80-Gbit/s switching module is fabricated in combination with a developed scalable-distributed-arbitration technique, and a WDM interconnection system that connects multiple 80-Gbit/s switching modules is developed. Using these components, an experimental 640-Gbit/s switching system is partially constructed. The 640-Gbit/s switching system will be applied to future broadband ATM networks.},
keywords={},
doi={},
ISSN={},
month={July},}
Salinan
TY - JOUR
TI - OPTIMA: Scalable, Multi-Stage, 640-Gbit/s ATM Switching System Based on Advanced Electronic and Optical WDM Technologies
T2 - IEICE TRANSACTIONS on Communications
SP - 1488
EP - 1496
AU - Naoaki YAMANAKA
AU - Eiji OKI
AU - Seisho YASUKAWA
AU - Ryusuke KAWANO
AU - Katsuhiko OKAZAKI
PY - 2000
DO -
JO - IEICE TRANSACTIONS on Communications
SN -
VL - E83-B
IS - 7
JA - IEICE TRANSACTIONS on Communications
Y1 - July 2000
AB - An experimental 640-Gbit/s ATM switching system is described. The switching system is scalable and quasi-non-blocking and uses hardware self-rearrangement in a three-stage network. Hardware implementation results for the switching system are presented. The switching system is fabricated using advanced 0.25-µm CMOS devices, high-density multi-chip-module (MCM) technology, and optical wavelength-division-multiplexing (WDM) interconnection technology. A scalable 80-Gbit/s switching module is fabricated in combination with a developed scalable-distributed-arbitration technique, and a WDM interconnection system that connects multiple 80-Gbit/s switching modules is developed. Using these components, an experimental 640-Gbit/s switching system is partially constructed. The 640-Gbit/s switching system will be applied to future broadband ATM networks.
ER -