The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Dalam kertas ini, skim pampasan baharu dan struktur elemen pas yang sepadan untuk pengawal selia keciciran rendah (LDO) CMOS dibentangkan. Pendekatan yang dicadangkan secara berkesan mengurangkan kekangan kestabilan yang ketat pada ESR kapasitor keluaran. Kestabilan CMOS LDO dengan pampasan konvensional memerlukan rintangan siri berkesan (ESR) bagi kapasitor keluaran dalam kawasan seperti terowong. Dengan pendekatan reka bentuk yang dicadangkan, LDO boleh stabil menggunakan kapasitor keluaran tanpa ESR. LDO 2.5 V/150 mA telah dilaksanakan menggunakan proses CMOS 0.5-µm 1P2M. Keputusan eksperimen menggambarkan bahawa LDO yang dicadangkan adalah stabil dengan kapasitor keluaran 0.33 µF dan tiada ESR.
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Salinan
Hsuan-I PAN, Chern-Lin CHEN, "A CMOS Low Dropout Regulator with Extended Stable Region for the Effective Series Resistance of the Output Capacitor" in IEICE TRANSACTIONS on Electronics,
vol. E91-C, no. 8, pp. 1356-1364, August 2008, doi: 10.1093/ietele/e91-c.8.1356.
Abstract: In this paper, a new compensation scheme and a corresponding pass element structure for a CMOS low-dropout regulator (LDO) are presented. The proposed approach effectively alleviates the strict stability constraint on the ESR of the output capacitor. Stability of a CMOS LDO with the conventional compensation requires the effective series resistance (ESR) of the output capacitor in a tunnel-like region. With the proposed design approach, an LDO can be stable using an output capacitor without ESR. A 2.5 V/150 mA LDO has been implemented using a 0.5-µm 1P2M CMOS process. The experimental results illustrate that the proposed LDO is stable with an output capacitor of 0.33 µF and no ESR.
URL: https://global.ieice.org/en_transactions/electronics/10.1093/ietele/e91-c.8.1356/_p
Salinan
@ARTICLE{e91-c_8_1356,
author={Hsuan-I PAN, Chern-Lin CHEN, },
journal={IEICE TRANSACTIONS on Electronics},
title={A CMOS Low Dropout Regulator with Extended Stable Region for the Effective Series Resistance of the Output Capacitor},
year={2008},
volume={E91-C},
number={8},
pages={1356-1364},
abstract={In this paper, a new compensation scheme and a corresponding pass element structure for a CMOS low-dropout regulator (LDO) are presented. The proposed approach effectively alleviates the strict stability constraint on the ESR of the output capacitor. Stability of a CMOS LDO with the conventional compensation requires the effective series resistance (ESR) of the output capacitor in a tunnel-like region. With the proposed design approach, an LDO can be stable using an output capacitor without ESR. A 2.5 V/150 mA LDO has been implemented using a 0.5-µm 1P2M CMOS process. The experimental results illustrate that the proposed LDO is stable with an output capacitor of 0.33 µF and no ESR.},
keywords={},
doi={10.1093/ietele/e91-c.8.1356},
ISSN={1745-1353},
month={August},}
Salinan
TY - JOUR
TI - A CMOS Low Dropout Regulator with Extended Stable Region for the Effective Series Resistance of the Output Capacitor
T2 - IEICE TRANSACTIONS on Electronics
SP - 1356
EP - 1364
AU - Hsuan-I PAN
AU - Chern-Lin CHEN
PY - 2008
DO - 10.1093/ietele/e91-c.8.1356
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E91-C
IS - 8
JA - IEICE TRANSACTIONS on Electronics
Y1 - August 2008
AB - In this paper, a new compensation scheme and a corresponding pass element structure for a CMOS low-dropout regulator (LDO) are presented. The proposed approach effectively alleviates the strict stability constraint on the ESR of the output capacitor. Stability of a CMOS LDO with the conventional compensation requires the effective series resistance (ESR) of the output capacitor in a tunnel-like region. With the proposed design approach, an LDO can be stable using an output capacitor without ESR. A 2.5 V/150 mA LDO has been implemented using a 0.5-µm 1P2M CMOS process. The experimental results illustrate that the proposed LDO is stable with an output capacitor of 0.33 µF and no ESR.
ER -