The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
HJFET AlGaAs/InGaAs mendapat keuntungan tinggi telah dibangunkan dengan teknologi get Embedded untuk IC Gelombang Mikro dan Gelombang Milimeter menggunakan litografi EB (EMMIE). EMMIE terdiri daripada SiO langsung2 dibuka dengan goresan kering dua langkah dengan topeng rintangan yang diperkuat secara kimia. Corak get 0.14 µm yang digariskan pada wafer 4 inci menunjukkan sisihan kecil 10 nm dalam Lg dan Vth sisihan piawai 55 mV. Jarak optimum antara bahagian atas pintu pagar dan permukaan ceruk (hg) telah ditentukan menggunakan simulator peranti dua dimensi untuk menyiasat kesan get fringing untuk mengalirkan kapasitans pada prestasi perolehan RF. Penguat satu peringkat HJFET MMIC yang direka mempamerkan prestasi perolehan yang sangat tinggi iaitu 12.4 dB pada 76 GHz.
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Salinan
Akio WAKEJIMA, Yoichi MAKINO, Katsumi YAMANOGUCHI, Norihiko SAMOTO, "High Performance HJFET MMIC with Embedded Gate Technology for Microwave and Millimeter-Wave IC's Using EB Lithography (EMMIE)" in IEICE TRANSACTIONS on Electronics,
vol. E82-C, no. 11, pp. 1977-1981, November 1999, doi: .
Abstract: A high gain AlGaAs/InGaAs HJFET has been developed with Embedded gate technology for Microwave and Millimeter-wave IC's using EB lithography (EMMIE). EMMIE consists of a direct SiO2 opening by two-step dry-etching with a chemically amplified resist mask. 0.14 µm gate patterns delineated on 4-inch wafers exhibited a small deviation of 10 nm in Lg and a Vth standard deviation of 55 mV. The optimum distance between the top of the gate and the recess surface (hg) was determined using a two-dimensional device simulator in order to investigate the effect of fringing gate to drain capacitance on the RF gain performance. The fabricated one-stage HJFET MMIC amplifier exhibited extremely high gain performance of 12.4 dB at 76 GHz.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e82-c_11_1977/_p
Salinan
@ARTICLE{e82-c_11_1977,
author={Akio WAKEJIMA, Yoichi MAKINO, Katsumi YAMANOGUCHI, Norihiko SAMOTO, },
journal={IEICE TRANSACTIONS on Electronics},
title={High Performance HJFET MMIC with Embedded Gate Technology for Microwave and Millimeter-Wave IC's Using EB Lithography (EMMIE)},
year={1999},
volume={E82-C},
number={11},
pages={1977-1981},
abstract={A high gain AlGaAs/InGaAs HJFET has been developed with Embedded gate technology for Microwave and Millimeter-wave IC's using EB lithography (EMMIE). EMMIE consists of a direct SiO2 opening by two-step dry-etching with a chemically amplified resist mask. 0.14 µm gate patterns delineated on 4-inch wafers exhibited a small deviation of 10 nm in Lg and a Vth standard deviation of 55 mV. The optimum distance between the top of the gate and the recess surface (hg) was determined using a two-dimensional device simulator in order to investigate the effect of fringing gate to drain capacitance on the RF gain performance. The fabricated one-stage HJFET MMIC amplifier exhibited extremely high gain performance of 12.4 dB at 76 GHz.},
keywords={},
doi={},
ISSN={},
month={November},}
Salinan
TY - JOUR
TI - High Performance HJFET MMIC with Embedded Gate Technology for Microwave and Millimeter-Wave IC's Using EB Lithography (EMMIE)
T2 - IEICE TRANSACTIONS on Electronics
SP - 1977
EP - 1981
AU - Akio WAKEJIMA
AU - Yoichi MAKINO
AU - Katsumi YAMANOGUCHI
AU - Norihiko SAMOTO
PY - 1999
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E82-C
IS - 11
JA - IEICE TRANSACTIONS on Electronics
Y1 - November 1999
AB - A high gain AlGaAs/InGaAs HJFET has been developed with Embedded gate technology for Microwave and Millimeter-wave IC's using EB lithography (EMMIE). EMMIE consists of a direct SiO2 opening by two-step dry-etching with a chemically amplified resist mask. 0.14 µm gate patterns delineated on 4-inch wafers exhibited a small deviation of 10 nm in Lg and a Vth standard deviation of 55 mV. The optimum distance between the top of the gate and the recess surface (hg) was determined using a two-dimensional device simulator in order to investigate the effect of fringing gate to drain capacitance on the RF gain performance. The fabricated one-stage HJFET MMIC amplifier exhibited extremely high gain performance of 12.4 dB at 76 GHz.
ER -