The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Kami telah meningkatkan kebolehpercayaan mekanikal peranti semikonduktor submikron dalam dengan menggunakan teknik simulasi. Jenis kerosakan biasa yang mengurangkan kebolehpercayaan ialah kehelan dalam substrat silikon, penembusan atau keretakan filem nipis, dan kemerosotan ciri elektronik peranti. Tegasan mekanikal yang berkembang dalam struktur peranti disebabkan oleh bukan sahaja ketidakpadanan dalam pekali pengembangan haba antara bahan filem nipis tetapi juga tegasan intrinsik filem nipis seperti poli-silikon dan silisid. Corak halus dengan goresan kering menjadikan tepi tajam dan ia juga menyebabkan kepekatan tekanan dan dengan itu tekanan tinggi. Proses pembuatan di mana tekanan berkembang terutamanya adalah pengasingan, pembentukan pintu, dan pembentukan saling. Kami telah membangunkan kaedah untuk mengurangkan tekanan dalam setiap proses yang disebutkan di atas. Pengurangan tekanan ini sangat berkesan untuk pembuatan yang sangat boleh dipercayai. Akhir sekali, kami menjelaskan kesan tegasan baki dalam struktur transistor pada peralihan ciri elektronik transistor MOS.
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Salinan
Hideo MIURA, Shuji IKEDA, "Mechanical Stress Simulation for Highly Reliable Deep-Submicron Devices" in IEICE TRANSACTIONS on Electronics,
vol. E82-C, no. 6, pp. 830-838, June 1999, doi: .
Abstract: We have improved the mechanical reliability of deep-submicron semiconductor devices by applying a simulation technique. Typical kinds of damages that reduce the reliability are dislocations in silicon substrates, delamination or cracking of thin films, and deterioration of electronic characteristics of devices. The mechanical stress that develops in device structures is caused by not only mismatches in thermal expansion coefficients among thin film materials but also intrinsic stress of thin films such as poly-silicon and silicides. Fine patterning by dry etching makes sharp edges and they also cause stress concentration and thus high stress. The manufacturing processes in which stress mainly develops are isolation, gate formation, and interconnect formation. We have developed methods for reducing the stress in each of the above-mentioned process. This stress reduction is very effective for highly reliable manufacturing. Finally, we clarify the effect of the residual stress in transistor structures on shift in the electronic characteristics of MOS transistors.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e82-c_6_830/_p
Salinan
@ARTICLE{e82-c_6_830,
author={Hideo MIURA, Shuji IKEDA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Mechanical Stress Simulation for Highly Reliable Deep-Submicron Devices},
year={1999},
volume={E82-C},
number={6},
pages={830-838},
abstract={We have improved the mechanical reliability of deep-submicron semiconductor devices by applying a simulation technique. Typical kinds of damages that reduce the reliability are dislocations in silicon substrates, delamination or cracking of thin films, and deterioration of electronic characteristics of devices. The mechanical stress that develops in device structures is caused by not only mismatches in thermal expansion coefficients among thin film materials but also intrinsic stress of thin films such as poly-silicon and silicides. Fine patterning by dry etching makes sharp edges and they also cause stress concentration and thus high stress. The manufacturing processes in which stress mainly develops are isolation, gate formation, and interconnect formation. We have developed methods for reducing the stress in each of the above-mentioned process. This stress reduction is very effective for highly reliable manufacturing. Finally, we clarify the effect of the residual stress in transistor structures on shift in the electronic characteristics of MOS transistors.},
keywords={},
doi={},
ISSN={},
month={June},}
Salinan
TY - JOUR
TI - Mechanical Stress Simulation for Highly Reliable Deep-Submicron Devices
T2 - IEICE TRANSACTIONS on Electronics
SP - 830
EP - 838
AU - Hideo MIURA
AU - Shuji IKEDA
PY - 1999
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E82-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 1999
AB - We have improved the mechanical reliability of deep-submicron semiconductor devices by applying a simulation technique. Typical kinds of damages that reduce the reliability are dislocations in silicon substrates, delamination or cracking of thin films, and deterioration of electronic characteristics of devices. The mechanical stress that develops in device structures is caused by not only mismatches in thermal expansion coefficients among thin film materials but also intrinsic stress of thin films such as poly-silicon and silicides. Fine patterning by dry etching makes sharp edges and they also cause stress concentration and thus high stress. The manufacturing processes in which stress mainly develops are isolation, gate formation, and interconnect formation. We have developed methods for reducing the stress in each of the above-mentioned process. This stress reduction is very effective for highly reliable manufacturing. Finally, we clarify the effect of the residual stress in transistor structures on shift in the electronic characteristics of MOS transistors.
ER -