The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Memandangkan komunikasi tanpa wayar menembusi setiap sudut dunia, reka bentuk optimum dan analisis tepat RF, peranti semikonduktor kuasa menjadi salah satu cabaran terbesar dalam pembangunan alat EDA dan TCAD (Technology CAD). Tolok prestasi untuk peranti ini agak berbeza daripada untuk peranti digital atau analog yang bertujuan untuk aplikasi isyarat kecil kerana perolehan kuasa, kecekapan dan herotan (atau julat kelinearan) adalah kebimbangan reka bentuk yang paling utama. Dalam artikel ini, metodologi dan asas matematik untuk analisis berangka herotan isyarat besar pada peringkat simulasi peranti dibincangkan. Walaupun kaedah imbangan harmonik (HB) telah lama digunakan dalam simulasi litar untuk analisis herotan isyarat yang besar, pelaksanaan kaedah yang sama dalam simulasi peranti menghadapi cabaran yang menggerunkan, antaranya ialah kos pengiraan yang luar biasa dan pengurusan penyimpanan memori. Tetapi faedah daripada menjalankan simulasi tahap peranti sedemikian juga jelas--buat pertama kali, kesan teknologi dan variasi struktur peranti pada prestasi isyarat yang besar boleh dinilai secara langsung. Langkah-langkah yang perlu untuk menjadikan analisis HB boleh dilaksanakan dalam simulasi peranti digariskan dan penambahbaikan algoritma untuk meringankan beban pengiraan/penyimpanan dibincangkan. Aplikasi simulator peranti untuk pelbagai peranti kuasa RF, termasuk GaAs MESFET dan LDMOS silikon (MOS resapan sisi) dibentangkan, dan pandangan yang diperoleh daripada analisis sedemikian disediakan.
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Salinan
Zhiping YU, Robert W. DUTTON, Boris TROYANOSKY, Junko SATO-IWANAGA, "Large Signal Analysis of RF Circuits in Device Simulation" in IEICE TRANSACTIONS on Electronics,
vol. E82-C, no. 6, pp. 908-916, June 1999, doi: .
Abstract: As wireless communication is penetrating every corner of the globe, the optimum design and accurate analysis of RF, power semiconductor devices become one of the biggest challenges in EDA and TCAD (Technology CAD) tool development. The performance gauge for these devices is quite different from that for either digital or analog devices aimed at small-signal applications in that the power gain, efficiency, and distortion (or the range of linearity) are the utmost design concerns. In this article, the methodology and mathematical foundation for numerical analysis of large signal distortion at the device simulation level are discussed. Although the harmonic balance (HB) method has long been used in circuit simulation for large signal distortion analysis, the implementation of the same method in device simulation faces daunting challenges, among which are the tremendous computational cost and memory storage management. But the benefits from conducting such a device level simulation are also obvious--for the first time, the impact of technology and structural variation of device on large signal performance can directly be assessed. The necessary steps to make the HB analysis feasible in device simulation are outlined and algorithmic improvement to ease the computation/storage burden is discussed. The applications of the device simulator for various RF power devices, including GaAs MESFETs and silicon LDMOS (lateral diffusion MOS) are presented, and the insight gained from such an analysis is provided.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e82-c_6_908/_p
Salinan
@ARTICLE{e82-c_6_908,
author={Zhiping YU, Robert W. DUTTON, Boris TROYANOSKY, Junko SATO-IWANAGA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Large Signal Analysis of RF Circuits in Device Simulation},
year={1999},
volume={E82-C},
number={6},
pages={908-916},
abstract={As wireless communication is penetrating every corner of the globe, the optimum design and accurate analysis of RF, power semiconductor devices become one of the biggest challenges in EDA and TCAD (Technology CAD) tool development. The performance gauge for these devices is quite different from that for either digital or analog devices aimed at small-signal applications in that the power gain, efficiency, and distortion (or the range of linearity) are the utmost design concerns. In this article, the methodology and mathematical foundation for numerical analysis of large signal distortion at the device simulation level are discussed. Although the harmonic balance (HB) method has long been used in circuit simulation for large signal distortion analysis, the implementation of the same method in device simulation faces daunting challenges, among which are the tremendous computational cost and memory storage management. But the benefits from conducting such a device level simulation are also obvious--for the first time, the impact of technology and structural variation of device on large signal performance can directly be assessed. The necessary steps to make the HB analysis feasible in device simulation are outlined and algorithmic improvement to ease the computation/storage burden is discussed. The applications of the device simulator for various RF power devices, including GaAs MESFETs and silicon LDMOS (lateral diffusion MOS) are presented, and the insight gained from such an analysis is provided.},
keywords={},
doi={},
ISSN={},
month={June},}
Salinan
TY - JOUR
TI - Large Signal Analysis of RF Circuits in Device Simulation
T2 - IEICE TRANSACTIONS on Electronics
SP - 908
EP - 916
AU - Zhiping YU
AU - Robert W. DUTTON
AU - Boris TROYANOSKY
AU - Junko SATO-IWANAGA
PY - 1999
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E82-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 1999
AB - As wireless communication is penetrating every corner of the globe, the optimum design and accurate analysis of RF, power semiconductor devices become one of the biggest challenges in EDA and TCAD (Technology CAD) tool development. The performance gauge for these devices is quite different from that for either digital or analog devices aimed at small-signal applications in that the power gain, efficiency, and distortion (or the range of linearity) are the utmost design concerns. In this article, the methodology and mathematical foundation for numerical analysis of large signal distortion at the device simulation level are discussed. Although the harmonic balance (HB) method has long been used in circuit simulation for large signal distortion analysis, the implementation of the same method in device simulation faces daunting challenges, among which are the tremendous computational cost and memory storage management. But the benefits from conducting such a device level simulation are also obvious--for the first time, the impact of technology and structural variation of device on large signal performance can directly be assessed. The necessary steps to make the HB analysis feasible in device simulation are outlined and algorithmic improvement to ease the computation/storage burden is discussed. The applications of the device simulator for various RF power devices, including GaAs MESFETs and silicon LDMOS (lateral diffusion MOS) are presented, and the insight gained from such an analysis is provided.
ER -