The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Simulator peranti yang mensimulasikan prestasi peranti dalam keadaan mantap pincang kitaran telah dibangunkan dan ia digunakan pada kesan corak nadi hetero-junction FET (HJFET) GaAs. Walaupun terdapat perbezaan malar masa yang besar antara isyarat nadi dan tindak balas perangkap dalam, simulator mencari keadaan mantap pincang kitaran pada kira-kira 30 lelaran. Anjakan bukan linear dalam paras arus longkang dengan nisbah tanda telah disahkan, yang telah dianggarkan daripada persamaan kadar tangkapan dan pelepasan elektron berdasarkan statistik Shockley-Read-Hall untuk perangkap dalam.
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Salinan
Yuji TAKAHASHI, Kazuaki KUNIHIRO, Yasuo OHNO, "Two-Dimensional Cyclic Bias Device Simulator and Its Application to GaAs HJFET Pulse Pattern Effect Analysis" in IEICE TRANSACTIONS on Electronics,
vol. E82-C, no. 6, pp. 917-923, June 1999, doi: .
Abstract: A device simulator that simulates device performance in the cyclic bias steady state was developed, and it was applied to GaAs hetero-junction FET (HJFET) pulse pattern effect. Although there is a large time-constant difference between the pulse signals and deep trap reactions, the simulator searches the cyclic bias steady states at about 30 iterations. A non-linear shift in the drain current level with the mark ratio was confirmed, which has been estimated from the rate equation of electron capture and emission based on Shockley-Read-Hall statistics for deep traps.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e82-c_6_917/_p
Salinan
@ARTICLE{e82-c_6_917,
author={Yuji TAKAHASHI, Kazuaki KUNIHIRO, Yasuo OHNO, },
journal={IEICE TRANSACTIONS on Electronics},
title={Two-Dimensional Cyclic Bias Device Simulator and Its Application to GaAs HJFET Pulse Pattern Effect Analysis},
year={1999},
volume={E82-C},
number={6},
pages={917-923},
abstract={A device simulator that simulates device performance in the cyclic bias steady state was developed, and it was applied to GaAs hetero-junction FET (HJFET) pulse pattern effect. Although there is a large time-constant difference between the pulse signals and deep trap reactions, the simulator searches the cyclic bias steady states at about 30 iterations. A non-linear shift in the drain current level with the mark ratio was confirmed, which has been estimated from the rate equation of electron capture and emission based on Shockley-Read-Hall statistics for deep traps.},
keywords={},
doi={},
ISSN={},
month={June},}
Salinan
TY - JOUR
TI - Two-Dimensional Cyclic Bias Device Simulator and Its Application to GaAs HJFET Pulse Pattern Effect Analysis
T2 - IEICE TRANSACTIONS on Electronics
SP - 917
EP - 923
AU - Yuji TAKAHASHI
AU - Kazuaki KUNIHIRO
AU - Yasuo OHNO
PY - 1999
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E82-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 1999
AB - A device simulator that simulates device performance in the cyclic bias steady state was developed, and it was applied to GaAs hetero-junction FET (HJFET) pulse pattern effect. Although there is a large time-constant difference between the pulse signals and deep trap reactions, the simulator searches the cyclic bias steady states at about 30 iterations. A non-linear shift in the drain current level with the mark ratio was confirmed, which has been estimated from the rate equation of electron capture and emission based on Shockley-Read-Hall statistics for deep traps.
ER -