The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Pemacu keluaran CMOS saluran terbuka pada cip sepenuhnya telah direka untuk DRAM lebar jalur tinggi, supaya ayunan voltan keluarannya tidak sensitif kepada variasi suhu dan voltan bekalan. Isyarat muat semula automatik digunakan untuk mengemas kini kandungan daftar kawalan semasa, yang menentukan transistor dihidupkan antara enam transistor berwajaran binari pemacu output. Oleh kerana isyarat muat semula automatik tersedia dalam cip DRAM, pemacu output kerja ini tidak memerlukan sebarang isyarat luaran untuk mengemas kini daftar kawalan semasa. Semasa selang masa semasa kemas kini sedang dijalankan, gelung maklum balas negatif dibentuk untuk mengekalkan voltan keluaran tahap rendah (VOL) untuk sama dengan voltan rujukan (VOL.ref) yang dihasilkan oleh litar rujukan celah jalur voltan rendah. Keputusan ujian menunjukkan operasi yang berjaya pada kadar data sehingga 1 Gb/s. Variasi kes terburuk bagi VOL.ref and VOL daripada pemacu keluaran yang dicadangkan diukur masing-masing 2.5% dan 7.5% dalam julat suhu 20
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Salinan
Young-Hee KIM, Jong-Doo JOO, Jae-Kyung WEE, Jin-Yong CHUNG, Young-Soo SOHN, Hong-June PARK, "A Temperature- and Supply-Insensitive Fully On-Chip 1 Gb/s CMOS Open-Drain Output Driver for High-Bandwidth DRAMs" in IEICE TRANSACTIONS on Electronics,
vol. E85-C, no. 1, pp. 204-211, January 2002, doi: .
Abstract: A fully on-chip open-drain CMOS output driver was designed for high bandwidth DRAMs, such that its output voltage swing was insensitive to the variations of temperature and supply voltage. An auto refresh signal was used to update the contents of the current control register, which determined the transistors to be turned-on among the six binary-weighted transistors of an output driver. Because the auto refresh signal is available in DRAM chips, the output driver of this work does not require any external signals to update the current control register. During the time interval while the update is in progress, a negative feedback loop is formed to maintain the low level output voltage (VOL) to be equal to the reference voltage (VOL.ref) which is generated by a low-voltage bandgap reference circuit. Test results showed the successful operation at the data rate up to 1 Gb/s. The worst-case variations of VOL.ref and VOL of the proposed output driver were measured to be 2.5% and 7.5% respectively within a temperature range of 20
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e85-c_1_204/_p
Salinan
@ARTICLE{e85-c_1_204,
author={Young-Hee KIM, Jong-Doo JOO, Jae-Kyung WEE, Jin-Yong CHUNG, Young-Soo SOHN, Hong-June PARK, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Temperature- and Supply-Insensitive Fully On-Chip 1 Gb/s CMOS Open-Drain Output Driver for High-Bandwidth DRAMs},
year={2002},
volume={E85-C},
number={1},
pages={204-211},
abstract={A fully on-chip open-drain CMOS output driver was designed for high bandwidth DRAMs, such that its output voltage swing was insensitive to the variations of temperature and supply voltage. An auto refresh signal was used to update the contents of the current control register, which determined the transistors to be turned-on among the six binary-weighted transistors of an output driver. Because the auto refresh signal is available in DRAM chips, the output driver of this work does not require any external signals to update the current control register. During the time interval while the update is in progress, a negative feedback loop is formed to maintain the low level output voltage (VOL) to be equal to the reference voltage (VOL.ref) which is generated by a low-voltage bandgap reference circuit. Test results showed the successful operation at the data rate up to 1 Gb/s. The worst-case variations of VOL.ref and VOL of the proposed output driver were measured to be 2.5% and 7.5% respectively within a temperature range of 20
keywords={},
doi={},
ISSN={},
month={January},}
Salinan
TY - JOUR
TI - A Temperature- and Supply-Insensitive Fully On-Chip 1 Gb/s CMOS Open-Drain Output Driver for High-Bandwidth DRAMs
T2 - IEICE TRANSACTIONS on Electronics
SP - 204
EP - 211
AU - Young-Hee KIM
AU - Jong-Doo JOO
AU - Jae-Kyung WEE
AU - Jin-Yong CHUNG
AU - Young-Soo SOHN
AU - Hong-June PARK
PY - 2002
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E85-C
IS - 1
JA - IEICE TRANSACTIONS on Electronics
Y1 - January 2002
AB - A fully on-chip open-drain CMOS output driver was designed for high bandwidth DRAMs, such that its output voltage swing was insensitive to the variations of temperature and supply voltage. An auto refresh signal was used to update the contents of the current control register, which determined the transistors to be turned-on among the six binary-weighted transistors of an output driver. Because the auto refresh signal is available in DRAM chips, the output driver of this work does not require any external signals to update the current control register. During the time interval while the update is in progress, a negative feedback loop is formed to maintain the low level output voltage (VOL) to be equal to the reference voltage (VOL.ref) which is generated by a low-voltage bandgap reference circuit. Test results showed the successful operation at the data rate up to 1 Gb/s. The worst-case variations of VOL.ref and VOL of the proposed output driver were measured to be 2.5% and 7.5% respectively within a temperature range of 20
ER -