The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Untuk penguat kuasa RF, input dan output terdedahnya terdedah kepada kerosakan akibat kerosakan Elektrostatik (ESD). Perlindungan dwi-arah diperlukan pada input dalam mod operasi tolak-tarik. Dalam kertas kerja ini, mempertimbangkan keserasian proses kepada penguat kuasa, NMOS (ggNMOS) dan diod Polysilicon (PDIO) berlatarkan Grounded-gate ditindan bersama untuk membentuk pengapit ESD dengan perlindungan ke hadapan dan belakang. Melalui pengukuran nadi talian penghantaran (TLP) dan CV, pengapit ditunjukkan sebagai perlindungan ESD dua hala kebal dan kapasiti parasit rendah, dengan voltan penahan 18.67/17.34V (Vmemegang), voltan perlindungan ESD 4.6/3.2kV (VESD), 0.401/0.415pF kemuatan parasit (CESD) pada arah hadapan dan arah belakang, masing-masing.
Yibo JIANG
Changzhou Institute of Technology
Hui BI
Changzhou University
Wei ZHAO
Changzhou Institute of Technology
Chen SHI
Changzhou Institute of Technology
Xiaolei WANG
The Institute of Microelectronics of Chinese Academy of Sciences
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
Salinan
Yibo JIANG, Hui BI, Wei ZHAO, Chen SHI, Xiaolei WANG, "Latch-Up Immune Bi-Direction ESD Protection Clamp for Push-Pull RF Power Amplifier" in IEICE TRANSACTIONS on Electronics,
vol. E103-C, no. 4, pp. 194-196, April 2020, doi: 10.1587/transele.2019ECS6012.
Abstract: For the RF power amplifier, its exposed input and output are susceptible to damage from Electrostatic (ESD) damage. The bi-direction protection is required at the input in push-pull operating mode. In this paper, considering the process compatibility to the power amplifier, cascaded Grounded-gate NMOS (ggNMOS) and Polysilicon diodes (PDIO) are stacked together to form an ESD clamp with forward and reverse protection. Through Transmission line pulse (TLP) and CV measurements, the clamp is demonstrated as latch-up immune and low parasitic capacitance bi-direction ESD protection, with 18.67/17.34V holding voltage (Vhold), 4.6/3.2kV ESD protection voltage (VESD), 0.401/0.415pF parasitic capacitance (CESD) on forward and reverse direction, respectively.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.2019ECS6012/_p
Salinan
@ARTICLE{e103-c_4_194,
author={Yibo JIANG, Hui BI, Wei ZHAO, Chen SHI, Xiaolei WANG, },
journal={IEICE TRANSACTIONS on Electronics},
title={Latch-Up Immune Bi-Direction ESD Protection Clamp for Push-Pull RF Power Amplifier},
year={2020},
volume={E103-C},
number={4},
pages={194-196},
abstract={For the RF power amplifier, its exposed input and output are susceptible to damage from Electrostatic (ESD) damage. The bi-direction protection is required at the input in push-pull operating mode. In this paper, considering the process compatibility to the power amplifier, cascaded Grounded-gate NMOS (ggNMOS) and Polysilicon diodes (PDIO) are stacked together to form an ESD clamp with forward and reverse protection. Through Transmission line pulse (TLP) and CV measurements, the clamp is demonstrated as latch-up immune and low parasitic capacitance bi-direction ESD protection, with 18.67/17.34V holding voltage (Vhold), 4.6/3.2kV ESD protection voltage (VESD), 0.401/0.415pF parasitic capacitance (CESD) on forward and reverse direction, respectively.},
keywords={},
doi={10.1587/transele.2019ECS6012},
ISSN={1745-1353},
month={April},}
Salinan
TY - JOUR
TI - Latch-Up Immune Bi-Direction ESD Protection Clamp for Push-Pull RF Power Amplifier
T2 - IEICE TRANSACTIONS on Electronics
SP - 194
EP - 196
AU - Yibo JIANG
AU - Hui BI
AU - Wei ZHAO
AU - Chen SHI
AU - Xiaolei WANG
PY - 2020
DO - 10.1587/transele.2019ECS6012
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E103-C
IS - 4
JA - IEICE TRANSACTIONS on Electronics
Y1 - April 2020
AB - For the RF power amplifier, its exposed input and output are susceptible to damage from Electrostatic (ESD) damage. The bi-direction protection is required at the input in push-pull operating mode. In this paper, considering the process compatibility to the power amplifier, cascaded Grounded-gate NMOS (ggNMOS) and Polysilicon diodes (PDIO) are stacked together to form an ESD clamp with forward and reverse protection. Through Transmission line pulse (TLP) and CV measurements, the clamp is demonstrated as latch-up immune and low parasitic capacitance bi-direction ESD protection, with 18.67/17.34V holding voltage (Vhold), 4.6/3.2kV ESD protection voltage (VESD), 0.401/0.415pF parasitic capacitance (CESD) on forward and reverse direction, respectively.
ER -