The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Dalam makalah ini, kami mencadangkan pengayun kristal hibrid yang mencapai kedua-dua permulaan pantas dan penggunaan kuasa keadaan mantap yang rendah. Pada permulaan, rintangan negatif yang besar direalisasikan dengan mengkonfigurasi litar berayun Pierce dengan penguat penyongsang berbilang peringkat, menghasilkan permulaan berkelajuan tinggi. Semasa ayunan keadaan mantap, pengayun dikonfigurasikan semula sebagai litar Colpitts pelengkap kelas-C untuk penggunaan kuasa rendah dan hingar fasa rendah. Cip prototaip telah direka dalam teknologi proses CMOS 65nm. Dengan konfigurasi jenis Pierce, masa permulaan yang diukur dan tenaga permulaan pengayun dikurangkan kepada 1/11 dan 1/5, masing-masing, berbanding dengan yang tanpa konfigurasi jenis Pierce. Penggunaan kuasa semasa ayunan mantap ialah 30 µW.
Masaya MIYAHARA
KEK
Zule XU
University of Tokyo
Takehito ISHII
Piezo Studio Inc.
Noritoshi KIMURA
Piezo Studio Inc.
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Salinan
Masaya MIYAHARA, Zule XU, Takehito ISHII, Noritoshi KIMURA, "A Quick Startup Low-Power Hybrid Crystal Oscillator for IoT Applications" in IEICE TRANSACTIONS on Electronics,
vol. E106-C, no. 10, pp. 521-528, October 2023, doi: 10.1587/transele.2022CTP0002.
Abstract: In this paper, we propose a hybrid crystal oscillator which achieves both quick startup and low steady-state power consumption. At startup, a large negative resistance is realized by configuring a Pierce oscillating circuit with a multi-stage inverter amplifier, resulting in high-speed startup. During steady-state oscillation, the oscillator is reconfigured as a class-C complementary Colpitts circuit for low power consumption and low phase noise. Prototype chips were fabricated in 65nm CMOS process technology. With Pierce-type configuration, the measured startup time and startup energy of the oscillator are reduced to 1/11 and 1/5, respectively, compared with the one without Pierce-type configuration. The power consumption during steady oscillation is 30 µW.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.2022CTP0002/_p
Salinan
@ARTICLE{e106-c_10_521,
author={Masaya MIYAHARA, Zule XU, Takehito ISHII, Noritoshi KIMURA, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Quick Startup Low-Power Hybrid Crystal Oscillator for IoT Applications},
year={2023},
volume={E106-C},
number={10},
pages={521-528},
abstract={In this paper, we propose a hybrid crystal oscillator which achieves both quick startup and low steady-state power consumption. At startup, a large negative resistance is realized by configuring a Pierce oscillating circuit with a multi-stage inverter amplifier, resulting in high-speed startup. During steady-state oscillation, the oscillator is reconfigured as a class-C complementary Colpitts circuit for low power consumption and low phase noise. Prototype chips were fabricated in 65nm CMOS process technology. With Pierce-type configuration, the measured startup time and startup energy of the oscillator are reduced to 1/11 and 1/5, respectively, compared with the one without Pierce-type configuration. The power consumption during steady oscillation is 30 µW.},
keywords={},
doi={10.1587/transele.2022CTP0002},
ISSN={1745-1353},
month={October},}
Salinan
TY - JOUR
TI - A Quick Startup Low-Power Hybrid Crystal Oscillator for IoT Applications
T2 - IEICE TRANSACTIONS on Electronics
SP - 521
EP - 528
AU - Masaya MIYAHARA
AU - Zule XU
AU - Takehito ISHII
AU - Noritoshi KIMURA
PY - 2023
DO - 10.1587/transele.2022CTP0002
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E106-C
IS - 10
JA - IEICE TRANSACTIONS on Electronics
Y1 - October 2023
AB - In this paper, we propose a hybrid crystal oscillator which achieves both quick startup and low steady-state power consumption. At startup, a large negative resistance is realized by configuring a Pierce oscillating circuit with a multi-stage inverter amplifier, resulting in high-speed startup. During steady-state oscillation, the oscillator is reconfigured as a class-C complementary Colpitts circuit for low power consumption and low phase noise. Prototype chips were fabricated in 65nm CMOS process technology. With Pierce-type configuration, the measured startup time and startup energy of the oscillator are reduced to 1/11 and 1/5, respectively, compared with the one without Pierce-type configuration. The power consumption during steady oscillation is 30 µW.
ER -