The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
pandangan teks lengkap
118
Sublitar yang kerap berlaku terdiri daripada gelung perintang (R), transistor kesan medan (FET), dan kapasitor (C). FET bertindak sebagai suis, dikawal pada terminal pintunya dengan voltan jam. Litar kecil ini mungkin bertindak sebagai sampel-dan-tahan (S/H), sebagai pengadun pasif (PM), atau sebagai penapis laluan jalur atau impedans laluan jalur. Dalam kerja ini, kami akan membentangkan analisis berguna yang membawa kepada graf aliran isyarat mudah (SFG), yang menangkap tindakan litar FET-RC sepenuhnya merentasi pelbagai parameter reka bentuk. SFG membedah litar kepada tiga fungsi penapisan dan pensampelan yang ideal. Ini sangat memudahkan analisis tindak balas frekuensi, hingar, galangan input dan keuntungan penukaran, dan membawa kepada garis panduan untuk reka bentuk optimum. Kertas kerja ini memberi tumpuan kepada analisis ciri pemindahan isyarat litar FET-RC satu laluan termasuk pembinaan semula bentuk gelombang lengkap daripada voltan sampel masa diskret.
Tetsuya IIZUKA
The University of Tokyo
Asad A. ABIDI
University of California
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Salinan
Tetsuya IIZUKA, Asad A. ABIDI, "A Unified Analysis of the Signal Transfer Characteristics of a Single-Path FET-R-C Circuit" in IEICE TRANSACTIONS on Electronics,
vol. E101-C, no. 7, pp. 432-443, July 2018, doi: 10.1587/transele.E101.C.432.
Abstract: A frequently occurring subcircuit consists of a loop of a resistor (R), a field-effect transistor (FET), and a capacitor (C). The FET acts as a switch, controlled at its gate terminal by a clock voltage. This subcircuit may be acting as a sample-and-hold (S/H), as a passive mixer (P-M), or as a bandpass filter or bandpass impedance. In this work, we will present a useful analysis that leads to a simple signal flow graph (SFG), which captures the FET-R-C circuit's action completely across a wide range of design parameters. The SFG dissects the circuit into three filtering functions and ideal sampling. This greatly simplifies analysis of frequency response, noise, input impedance, and conversion gain, and leads to guidelines for optimum design. This paper focuses on the analysis of a single-path FET-R-C circuit's signal transfer characteristics including the reconstruction of the complete waveform from the discrete-time sampled voltage.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E101.C.432/_p
Salinan
@ARTICLE{e101-c_7_432,
author={Tetsuya IIZUKA, Asad A. ABIDI, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Unified Analysis of the Signal Transfer Characteristics of a Single-Path FET-R-C Circuit},
year={2018},
volume={E101-C},
number={7},
pages={432-443},
abstract={A frequently occurring subcircuit consists of a loop of a resistor (R), a field-effect transistor (FET), and a capacitor (C). The FET acts as a switch, controlled at its gate terminal by a clock voltage. This subcircuit may be acting as a sample-and-hold (S/H), as a passive mixer (P-M), or as a bandpass filter or bandpass impedance. In this work, we will present a useful analysis that leads to a simple signal flow graph (SFG), which captures the FET-R-C circuit's action completely across a wide range of design parameters. The SFG dissects the circuit into three filtering functions and ideal sampling. This greatly simplifies analysis of frequency response, noise, input impedance, and conversion gain, and leads to guidelines for optimum design. This paper focuses on the analysis of a single-path FET-R-C circuit's signal transfer characteristics including the reconstruction of the complete waveform from the discrete-time sampled voltage.},
keywords={},
doi={10.1587/transele.E101.C.432},
ISSN={1745-1353},
month={July},}
Salinan
TY - JOUR
TI - A Unified Analysis of the Signal Transfer Characteristics of a Single-Path FET-R-C Circuit
T2 - IEICE TRANSACTIONS on Electronics
SP - 432
EP - 443
AU - Tetsuya IIZUKA
AU - Asad A. ABIDI
PY - 2018
DO - 10.1587/transele.E101.C.432
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E101-C
IS - 7
JA - IEICE TRANSACTIONS on Electronics
Y1 - July 2018
AB - A frequently occurring subcircuit consists of a loop of a resistor (R), a field-effect transistor (FET), and a capacitor (C). The FET acts as a switch, controlled at its gate terminal by a clock voltage. This subcircuit may be acting as a sample-and-hold (S/H), as a passive mixer (P-M), or as a bandpass filter or bandpass impedance. In this work, we will present a useful analysis that leads to a simple signal flow graph (SFG), which captures the FET-R-C circuit's action completely across a wide range of design parameters. The SFG dissects the circuit into three filtering functions and ideal sampling. This greatly simplifies analysis of frequency response, noise, input impedance, and conversion gain, and leads to guidelines for optimum design. This paper focuses on the analysis of a single-path FET-R-C circuit's signal transfer characteristics including the reconstruction of the complete waveform from the discrete-time sampled voltage.
ER -