The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Untuk menyahcas tenaga nyahcas elektrostatik (ESD) dengan cepat, struktur perlindungan ESD pencetus voltan rendah tanpa bantuan dicadangkan dalam kerja ini. Di bawah tekanan berdenyut talian penghantaran (TLP), voltan pencetus, kelajuan hidupkan dan arus pecahan kedua boleh dipertingkatkan dengan jelas, berbanding dengan struktur perlindungan tradisional. Selain itu, tidak perlu menambah sebarang topeng tambahan atau melakukan sebarang pengubahsuaian proses untuk struktur baharu. Struktur yang dicadangkan telah disahkan dalam proses CMOS 0.18-µm foundry.
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Salinan
Bing LI, Yi SHAN, "An Unassisted Low-Voltage-Trigger ESD Protection Structure in a 0.18-µm CMOS Process without Extra Process Cost" in IEICE TRANSACTIONS on Electronics,
vol. E93-C, no. 8, pp. 1359-1364, August 2010, doi: 10.1587/transele.E93.C.1359.
Abstract: In order to quickly discharge the electrostatic discharge (ESD) energy, an unassisted low-voltage-trigger ESD protection structure is proposed in this work. Under transmission line pulsing (TLP) stress, the trigger voltage, turn-on speed and second breakdown current can be obviously improved, as compared with the traditional protection structure. Moreover there is no need to add any extra mask or do any process modification for the new structure. The proposed structure has been verified in foundry's 0.18-µm CMOS process.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E93.C.1359/_p
Salinan
@ARTICLE{e93-c_8_1359,
author={Bing LI, Yi SHAN, },
journal={IEICE TRANSACTIONS on Electronics},
title={An Unassisted Low-Voltage-Trigger ESD Protection Structure in a 0.18-µm CMOS Process without Extra Process Cost},
year={2010},
volume={E93-C},
number={8},
pages={1359-1364},
abstract={In order to quickly discharge the electrostatic discharge (ESD) energy, an unassisted low-voltage-trigger ESD protection structure is proposed in this work. Under transmission line pulsing (TLP) stress, the trigger voltage, turn-on speed and second breakdown current can be obviously improved, as compared with the traditional protection structure. Moreover there is no need to add any extra mask or do any process modification for the new structure. The proposed structure has been verified in foundry's 0.18-µm CMOS process.},
keywords={},
doi={10.1587/transele.E93.C.1359},
ISSN={1745-1353},
month={August},}
Salinan
TY - JOUR
TI - An Unassisted Low-Voltage-Trigger ESD Protection Structure in a 0.18-µm CMOS Process without Extra Process Cost
T2 - IEICE TRANSACTIONS on Electronics
SP - 1359
EP - 1364
AU - Bing LI
AU - Yi SHAN
PY - 2010
DO - 10.1587/transele.E93.C.1359
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E93-C
IS - 8
JA - IEICE TRANSACTIONS on Electronics
Y1 - August 2010
AB - In order to quickly discharge the electrostatic discharge (ESD) energy, an unassisted low-voltage-trigger ESD protection structure is proposed in this work. Under transmission line pulsing (TLP) stress, the trigger voltage, turn-on speed and second breakdown current can be obviously improved, as compared with the traditional protection structure. Moreover there is no need to add any extra mask or do any process modification for the new structure. The proposed structure has been verified in foundry's 0.18-µm CMOS process.
ER -