The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Kaedah analisis untuk membuat pertukaran antara julat penalaan dan ketak-linearan pembezaan (DNL) untuk pengayun dikawal secara digital (DCO) dicadangkan. Untuk mengesahkan pendekatan, DCO 12 bit direka bentuk, dilaksanakan dalam teknologi CMOS 0.18 µm, dan diuji. DNL yang diukur ialah -0.41 Least Significant Bit (LSB) tanpa merendahkan parameter lain yang merupakan yang terbaik setakat ini antara DCO yang dilaporkan.
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Salinan
Abhishek TOMAR, Shashank LINGALA, Ramesh K. POKHAREL, Haruichi KANAYA, Keiji YOSHIDA, "Modeling of Non-linearity in Digitally Controlled Oscillator in 0.18 µm CMOS Technology" in IEICE TRANSACTIONS on Electronics,
vol. E93-C, no. 10, pp. 1548-1549, October 2010, doi: 10.1587/transele.E93.C.1548.
Abstract: An analytical method to make a trade off between tuning range and differential non-linearity (DNL) for a digitally controlled oscillator (DCO) is proposed. To verify the approach, a 12 bit DCO is designed, implemented in 0.18 µm CMOS technology, and tested. The measured DNL was -0.41 Least Significant Bit (LSB) without degrading other parameters which is the best so far among the reported DCOs.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E93.C.1548/_p
Salinan
@ARTICLE{e93-c_10_1548,
author={Abhishek TOMAR, Shashank LINGALA, Ramesh K. POKHAREL, Haruichi KANAYA, Keiji YOSHIDA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Modeling of Non-linearity in Digitally Controlled Oscillator in 0.18 µm CMOS Technology},
year={2010},
volume={E93-C},
number={10},
pages={1548-1549},
abstract={An analytical method to make a trade off between tuning range and differential non-linearity (DNL) for a digitally controlled oscillator (DCO) is proposed. To verify the approach, a 12 bit DCO is designed, implemented in 0.18 µm CMOS technology, and tested. The measured DNL was -0.41 Least Significant Bit (LSB) without degrading other parameters which is the best so far among the reported DCOs.},
keywords={},
doi={10.1587/transele.E93.C.1548},
ISSN={1745-1353},
month={October},}
Salinan
TY - JOUR
TI - Modeling of Non-linearity in Digitally Controlled Oscillator in 0.18 µm CMOS Technology
T2 - IEICE TRANSACTIONS on Electronics
SP - 1548
EP - 1549
AU - Abhishek TOMAR
AU - Shashank LINGALA
AU - Ramesh K. POKHAREL
AU - Haruichi KANAYA
AU - Keiji YOSHIDA
PY - 2010
DO - 10.1587/transele.E93.C.1548
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E93-C
IS - 10
JA - IEICE TRANSACTIONS on Electronics
Y1 - October 2010
AB - An analytical method to make a trade off between tuning range and differential non-linearity (DNL) for a digitally controlled oscillator (DCO) is proposed. To verify the approach, a 12 bit DCO is designed, implemented in 0.18 µm CMOS technology, and tested. The measured DNL was -0.41 Least Significant Bit (LSB) without degrading other parameters which is the best so far among the reported DCOs.
ER -