The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Penyahmodulator kekunci anjakan fasa binari berkelajuan tinggi (BPSK) mod campuran untuk aplikasi rangkaian kawasan peribadi wayarles (WPAN) gelombang IEEE802.15.3c mm direalisasikan dengan proses CMOS 0.18-µm. Skim penyahmodulasi yang dicadangkan tidak memerlukan sebarang penukar analog-ke-digital (ADC) dan, akibatnya, boleh mempunyai kelebihan berbanding skim konvensional untuk penyahmodulasi kadar data tinggi. Teras penyahmodulasi menggunakan 53.8 mW daripada bekalan kuasa 2.5-V manakala kawasan cip ialah 380
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Salinan
Kwang-Chun CHOI, Minsu KO, Duho KIM, Woo-Young CHOI, "Demonstration of 60-GHz Link Using a 1.6-Gb/s Mixed-Mode BPSK Demodulator" in IEICE TRANSACTIONS on Electronics,
vol. E93-C, no. 12, pp. 1704-1707, December 2010, doi: 10.1587/transele.E93.C.1704.
Abstract: A mixed-mode high-speed binary phase-shift keying (BPSK) demodulator for IEEE802.15.3c mm-wave wireless personal area network (WPAN) application is realized with 0.18-µm CMOS process. The proposed demodulator scheme does not require any analog-to-digital converters (ADC) and, consequently, can have advantages over the conventional schemes for high-data-rate demodulation. The demodulator core consumes 53.8 mW from 2.5-V power supply while the chip area is 380
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E93.C.1704/_p
Salinan
@ARTICLE{e93-c_12_1704,
author={Kwang-Chun CHOI, Minsu KO, Duho KIM, Woo-Young CHOI, },
journal={IEICE TRANSACTIONS on Electronics},
title={Demonstration of 60-GHz Link Using a 1.6-Gb/s Mixed-Mode BPSK Demodulator},
year={2010},
volume={E93-C},
number={12},
pages={1704-1707},
abstract={A mixed-mode high-speed binary phase-shift keying (BPSK) demodulator for IEEE802.15.3c mm-wave wireless personal area network (WPAN) application is realized with 0.18-µm CMOS process. The proposed demodulator scheme does not require any analog-to-digital converters (ADC) and, consequently, can have advantages over the conventional schemes for high-data-rate demodulation. The demodulator core consumes 53.8 mW from 2.5-V power supply while the chip area is 380
keywords={},
doi={10.1587/transele.E93.C.1704},
ISSN={1745-1353},
month={December},}
Salinan
TY - JOUR
TI - Demonstration of 60-GHz Link Using a 1.6-Gb/s Mixed-Mode BPSK Demodulator
T2 - IEICE TRANSACTIONS on Electronics
SP - 1704
EP - 1707
AU - Kwang-Chun CHOI
AU - Minsu KO
AU - Duho KIM
AU - Woo-Young CHOI
PY - 2010
DO - 10.1587/transele.E93.C.1704
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E93-C
IS - 12
JA - IEICE TRANSACTIONS on Electronics
Y1 - December 2010
AB - A mixed-mode high-speed binary phase-shift keying (BPSK) demodulator for IEEE802.15.3c mm-wave wireless personal area network (WPAN) application is realized with 0.18-µm CMOS process. The proposed demodulator scheme does not require any analog-to-digital converters (ADC) and, consequently, can have advantages over the conventional schemes for high-data-rate demodulation. The demodulator core consumes 53.8 mW from 2.5-V power supply while the chip area is 380
ER -