The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Litar rintangan pembezaan negatif (NDR) berbilang puncak yang diperbuat daripada transistor kesan medan (MOS) berasaskan logam-oksida-semikonduktor berasaskan Si dan transistor bipolar heterojunction (HBT) berasaskan SiGe ditunjukkan. Kita boleh mendapatkan lengkung IV tiga puncak dengan menyambungkan tiga litar MOS-HBT-NDR berkode dengan mereka bentuk parameter MOS yang sesuai. Litar NDR tiga puncak novel ini mempunyai ciri voltan arus boleh laras dan nisbah arus puncak ke lembah (PVCR) yang tinggi. Kita boleh melaraskan nilai PVCR menjadi setinggi 11.5, 6.5 dan 10.3 untuk tiga puncak, masing-masing. Oleh kerana litar NDR ialah unsur tak linear yang sangat kuat, kami membincangkan fenomena histeresis ekstrinsik dalam litar NDR berbilang puncak ini. Kesan rintangan siri terhadap fenomena histerisis juga disiasat. Reka bentuk dan fabrikasi litar NDR kami adalah berdasarkan proses SiGe BiCMOS standard 0.35 µm.
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Salinan
Kwang-Jow GAN, Dong-Shong LIANG, "Investigation of Adjustable Current-Voltage Characteristics and Hysteresis Phenomena for Multiple-Peak Negative Differential Resistance Circuit" in IEICE TRANSACTIONS on Electronics,
vol. E93-C, no. 4, pp. 514-520, April 2010, doi: 10.1587/transele.E93.C.514.
Abstract: A multiple-peak negative differential resistance (NDR) circuit made of standard Si-based metal-oxide-semiconductor field-effect-transistor (MOS) and SiGe-based heterojunction bipolar transistor (HBT) is demonstrated. We can obtain a three-peak I-V curve by connecting three cascoded MOS-HBT-NDR circuits by suitably designing the MOS parameters. This novel three-peak NDR circuit possesses the adjustable current-voltage characteristics and high peak-to-valley current ratio (PVCR). We can adjust the PVCR values to be as high as 11.5, 6.5, and 10.3 for three peaks, respectively. Because the NDR circuit is a very strong nonlinear element, we discuss the extrinsic hysteresis phenomena in this multiple-peak NDR circuit. The effect of series resistance on hysteresis phenomena is also investigated. Our design and fabrication of the NDR circuit is based on the standard 0.35 µm SiGe BiCMOS process.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E93.C.514/_p
Salinan
@ARTICLE{e93-c_4_514,
author={Kwang-Jow GAN, Dong-Shong LIANG, },
journal={IEICE TRANSACTIONS on Electronics},
title={Investigation of Adjustable Current-Voltage Characteristics and Hysteresis Phenomena for Multiple-Peak Negative Differential Resistance Circuit},
year={2010},
volume={E93-C},
number={4},
pages={514-520},
abstract={A multiple-peak negative differential resistance (NDR) circuit made of standard Si-based metal-oxide-semiconductor field-effect-transistor (MOS) and SiGe-based heterojunction bipolar transistor (HBT) is demonstrated. We can obtain a three-peak I-V curve by connecting three cascoded MOS-HBT-NDR circuits by suitably designing the MOS parameters. This novel three-peak NDR circuit possesses the adjustable current-voltage characteristics and high peak-to-valley current ratio (PVCR). We can adjust the PVCR values to be as high as 11.5, 6.5, and 10.3 for three peaks, respectively. Because the NDR circuit is a very strong nonlinear element, we discuss the extrinsic hysteresis phenomena in this multiple-peak NDR circuit. The effect of series resistance on hysteresis phenomena is also investigated. Our design and fabrication of the NDR circuit is based on the standard 0.35 µm SiGe BiCMOS process.},
keywords={},
doi={10.1587/transele.E93.C.514},
ISSN={1745-1353},
month={April},}
Salinan
TY - JOUR
TI - Investigation of Adjustable Current-Voltage Characteristics and Hysteresis Phenomena for Multiple-Peak Negative Differential Resistance Circuit
T2 - IEICE TRANSACTIONS on Electronics
SP - 514
EP - 520
AU - Kwang-Jow GAN
AU - Dong-Shong LIANG
PY - 2010
DO - 10.1587/transele.E93.C.514
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E93-C
IS - 4
JA - IEICE TRANSACTIONS on Electronics
Y1 - April 2010
AB - A multiple-peak negative differential resistance (NDR) circuit made of standard Si-based metal-oxide-semiconductor field-effect-transistor (MOS) and SiGe-based heterojunction bipolar transistor (HBT) is demonstrated. We can obtain a three-peak I-V curve by connecting three cascoded MOS-HBT-NDR circuits by suitably designing the MOS parameters. This novel three-peak NDR circuit possesses the adjustable current-voltage characteristics and high peak-to-valley current ratio (PVCR). We can adjust the PVCR values to be as high as 11.5, 6.5, and 10.3 for three peaks, respectively. Because the NDR circuit is a very strong nonlinear element, we discuss the extrinsic hysteresis phenomena in this multiple-peak NDR circuit. The effect of series resistance on hysteresis phenomena is also investigated. Our design and fabrication of the NDR circuit is based on the standard 0.35 µm SiGe BiCMOS process.
ER -