The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Teknik kawalan perolehan dither dinamik untuk Penukar Digital-ke-Analog (DAC) delta-sigma berbilang peringkat menggunakan Padanan Elemen Dinamik (DEM) berbilang peringkat dengan penapis gelung tertib kedua dicadangkan. Teknik yang dicadangkan memberikan penambahbaikan pada prestasi membentuk ketidakpadanan melalui kawalan dinamik keuntungan dither modulator delta-sigma. Keuntungan dither yang besar, yang menindas pergantungan operasi DEM pada isyarat input, digunakan pada modulator delta-sigma, apabila output penapis gelung DEM lebih besar daripada rujukan yang direka bentuk. Contoh reka bentuk menggunakan teknik yang dicadangkan pada modulator delta-sigma 17 peringkat urutan ketiga dengan DEM berlatarkan 3 peringkat ditunjukkan dalam kertas ini. Hasil simulasi dengan 1% ketidakpadanan segmen analog menunjukkan lebih 10 dB peningkatan prestasi THD+N di bawah isyarat input amplitud -50 dB, berbanding kes tanpa teknik yang dicadangkan.
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Salinan
Yu TAMURA, Toru IDO, Kenji TANIGUCHI, "A Dynamic Dither Gain Control Technique for Multi-Level Delta-Sigma DACs with Multi-Stage Second Order Dynamic Element Matching" in IEICE TRANSACTIONS on Electronics,
vol. E94-C, no. 3, pp. 346-352, March 2011, doi: 10.1587/transele.E94.C.346.
Abstract: A dynamic dither gain control technique for multi-level delta-sigma Digital-to-Analog Converters (DACs) using multi-stage Dynamic Element Matching (DEM) with a second order loop filter is proposed. The proposed technique provides improvement on the mismatch shaping performance through dynamic control of delta-sigma modulator dither gain. A large dither gain, which suppresses DEM operation dependency on input signal, is applied to delta-sigma modulator, when DEM loop filter output is greater than a designed reference. The design example using the proposed technique on a third order 17-level delta-sigma modulator with 3-stage cascaded DEM is shown in this paper. Simulation result with 1% analog segment mismatch shows over 10 dB improvement of THD+N performance under -50 dB amplitude input signal, compared to the case without the proposed technique.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E94.C.346/_p
Salinan
@ARTICLE{e94-c_3_346,
author={Yu TAMURA, Toru IDO, Kenji TANIGUCHI, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Dynamic Dither Gain Control Technique for Multi-Level Delta-Sigma DACs with Multi-Stage Second Order Dynamic Element Matching},
year={2011},
volume={E94-C},
number={3},
pages={346-352},
abstract={A dynamic dither gain control technique for multi-level delta-sigma Digital-to-Analog Converters (DACs) using multi-stage Dynamic Element Matching (DEM) with a second order loop filter is proposed. The proposed technique provides improvement on the mismatch shaping performance through dynamic control of delta-sigma modulator dither gain. A large dither gain, which suppresses DEM operation dependency on input signal, is applied to delta-sigma modulator, when DEM loop filter output is greater than a designed reference. The design example using the proposed technique on a third order 17-level delta-sigma modulator with 3-stage cascaded DEM is shown in this paper. Simulation result with 1% analog segment mismatch shows over 10 dB improvement of THD+N performance under -50 dB amplitude input signal, compared to the case without the proposed technique.},
keywords={},
doi={10.1587/transele.E94.C.346},
ISSN={1745-1353},
month={March},}
Salinan
TY - JOUR
TI - A Dynamic Dither Gain Control Technique for Multi-Level Delta-Sigma DACs with Multi-Stage Second Order Dynamic Element Matching
T2 - IEICE TRANSACTIONS on Electronics
SP - 346
EP - 352
AU - Yu TAMURA
AU - Toru IDO
AU - Kenji TANIGUCHI
PY - 2011
DO - 10.1587/transele.E94.C.346
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E94-C
IS - 3
JA - IEICE TRANSACTIONS on Electronics
Y1 - March 2011
AB - A dynamic dither gain control technique for multi-level delta-sigma Digital-to-Analog Converters (DACs) using multi-stage Dynamic Element Matching (DEM) with a second order loop filter is proposed. The proposed technique provides improvement on the mismatch shaping performance through dynamic control of delta-sigma modulator dither gain. A large dither gain, which suppresses DEM operation dependency on input signal, is applied to delta-sigma modulator, when DEM loop filter output is greater than a designed reference. The design example using the proposed technique on a third order 17-level delta-sigma modulator with 3-stage cascaded DEM is shown in this paper. Simulation result with 1% analog segment mismatch shows over 10 dB improvement of THD+N performance under -50 dB amplitude input signal, compared to the case without the proposed technique.
ER -