The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Menyediakan pelbagai bantuan untuk pengubahsuaian reka bentuk pada kod sumber HDL adalah penting untuk kegunaan semula reka bentuk dan kitaran reka bentuk pantas dalam VLSI CAD. Penghirisan program ialah teknik kejuruteraan perisian untuk menganalisis, mengabstraksi dan mengubah atur cara. Kami menunjukkan algoritma untuk mengekstrak/mengalih keluar gelagat isyarat tertentu dalam perihalan VHDL. Kami juga menerangkan sistem penghirisan VHDL dan menunjukkan hasil percubaan mengekstrak komponen secara cekap daripada huraian VHDL.
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Salinan
Shigeru ICHINOSE, Mizuho IWAIHARA, Hiroto YASUURA, "Program Slicing on VHDL Descriptions and Its Evaluation" in IEICE TRANSACTIONS on Fundamentals,
vol. E81-A, no. 12, pp. 2585-2594, December 1998, doi: .
Abstract: Providing various assistances for design modifications on HDL source codes is important for design reuse and quick design cycle in VLSI CAD. Program slicing is a software-engineering technique for analyzing, abstracting, and transforming programs. We show algorithms for extracting/removing behaviors of specified signals in VHDL descriptions. We also describe a VHDL slicing system and show experimental results of efficiently extracting components from VHDL descriptions.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e81-a_12_2585/_p
Salinan
@ARTICLE{e81-a_12_2585,
author={Shigeru ICHINOSE, Mizuho IWAIHARA, Hiroto YASUURA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Program Slicing on VHDL Descriptions and Its Evaluation},
year={1998},
volume={E81-A},
number={12},
pages={2585-2594},
abstract={Providing various assistances for design modifications on HDL source codes is important for design reuse and quick design cycle in VLSI CAD. Program slicing is a software-engineering technique for analyzing, abstracting, and transforming programs. We show algorithms for extracting/removing behaviors of specified signals in VHDL descriptions. We also describe a VHDL slicing system and show experimental results of efficiently extracting components from VHDL descriptions.},
keywords={},
doi={},
ISSN={},
month={December},}
Salinan
TY - JOUR
TI - Program Slicing on VHDL Descriptions and Its Evaluation
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2585
EP - 2594
AU - Shigeru ICHINOSE
AU - Mizuho IWAIHARA
AU - Hiroto YASUURA
PY - 1998
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E81-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 1998
AB - Providing various assistances for design modifications on HDL source codes is important for design reuse and quick design cycle in VLSI CAD. Program slicing is a software-engineering technique for analyzing, abstracting, and transforming programs. We show algorithms for extracting/removing behaviors of specified signals in VHDL descriptions. We also describe a VHDL slicing system and show experimental results of efficiently extracting components from VHDL descriptions.
ER -