The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
IC pemancar penukaran langsung termasuk pengganda frekuensi yang dicadangkan, modulator kuadratur, dan pengecil pembolehubah 3-bit telah direka menggunakan teknologi BiCMOS dengan fT daripada 12 GHz. Seni bina yang menggunakan pengganda frekuensi ini bertujuan untuk merealisasikan terminal wayarles yang kos rendah dan bersaiz kecil. Seni bina ini berkesan untuk mengurangkan gangguan serius antara PA dan VCO dengan menjadikan frekuensi VCO berbeza daripada PA. Pengganda frekuensi yang dicadangkan terdiri daripada a dipacu semasa 90
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Salinan
Shoji OTAKA, Ryuichi FUJIMOTO, Hiroshi TANIMOTO, "A 1.9-GHz Direct Conversion Transmitter IC with Low Power On-Chip Frequency Doubler" in IEICE TRANSACTIONS on Fundamentals,
vol. E82-A, no. 2, pp. 313-319, February 1999, doi: .
Abstract: A direct conversion transmitter IC including a proposed frequency doubler, a quadrature modulator, and a 3-bit variable attenuator was fabricated using BiCMOS technology with fT of 12 GHz. This architecture employing frequency doubler is intended for realizing wireless terminals that are low in cost and small in size. The architecture is effective for reducing serious interference between PA and VCO by making the VCO frequency different from that of PA. The proposed frequency doubler comprises a current-driven 90
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e82-a_2_313/_p
Salinan
@ARTICLE{e82-a_2_313,
author={Shoji OTAKA, Ryuichi FUJIMOTO, Hiroshi TANIMOTO, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={A 1.9-GHz Direct Conversion Transmitter IC with Low Power On-Chip Frequency Doubler},
year={1999},
volume={E82-A},
number={2},
pages={313-319},
abstract={A direct conversion transmitter IC including a proposed frequency doubler, a quadrature modulator, and a 3-bit variable attenuator was fabricated using BiCMOS technology with fT of 12 GHz. This architecture employing frequency doubler is intended for realizing wireless terminals that are low in cost and small in size. The architecture is effective for reducing serious interference between PA and VCO by making the VCO frequency different from that of PA. The proposed frequency doubler comprises a current-driven 90
keywords={},
doi={},
ISSN={},
month={February},}
Salinan
TY - JOUR
TI - A 1.9-GHz Direct Conversion Transmitter IC with Low Power On-Chip Frequency Doubler
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 313
EP - 319
AU - Shoji OTAKA
AU - Ryuichi FUJIMOTO
AU - Hiroshi TANIMOTO
PY - 1999
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E82-A
IS - 2
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - February 1999
AB - A direct conversion transmitter IC including a proposed frequency doubler, a quadrature modulator, and a 3-bit variable attenuator was fabricated using BiCMOS technology with fT of 12 GHz. This architecture employing frequency doubler is intended for realizing wireless terminals that are low in cost and small in size. The architecture is effective for reducing serious interference between PA and VCO by making the VCO frequency different from that of PA. The proposed frequency doubler comprises a current-driven 90
ER -