The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Kertas kerja ini menangani pengesanan/lokasi kesalahan sistem berbilang pemproses dan kami membentangkan skema semakan berdasarkan graf Data Pemproses (MPD) yang Diubahsuai dengan mempertimbangkan model penjanaan/penyebaran ralat untuk sistem Toleransi Kesalahan Berasaskan Algoritma (ABFT). Model penyebaran ralat yang dipertimbangkan di sini membenarkan hasil pengiraan dengan berbilang (lebih daripada satu) input yang salah menjadi sama ada ralat atau bebas ralat. Juga algoritma asas untuk membina semakan untuk kesalahan tunggal boleh ditemui/dua kesalahan sistem ABFT yang boleh dikesan berdasarkan skema semakan diterangkan dengan contoh reka bentuk.
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Salinan
Choon-Sik PARK, Mineo KANEKO, "Checking Scheme for ABFT Systems Based on Modified PD Graph under an Error Generation/Propagation Model" in IEICE TRANSACTIONS on Fundamentals,
vol. E82-A, no. 6, pp. 1002-1008, June 1999, doi: .
Abstract: This paper treats a fault detection/location of multi-processor systems, and we present a checking scheme based on Modified Processor-Data (MPD) graph with considering an error generation/propagation model for Algorithm-Based Fault Tolerant (ABFT) systems. The error propagation model considered here allows a computation result with multiple (more than one) erroneous inputs to be either erroneous or error-free. Also a basic algorithm for constructing checks for single-fault locatable/two-fault detectable ABFT systems based on the checking scheme is described with design examples.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e82-a_6_1002/_p
Salinan
@ARTICLE{e82-a_6_1002,
author={Choon-Sik PARK, Mineo KANEKO, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Checking Scheme for ABFT Systems Based on Modified PD Graph under an Error Generation/Propagation Model},
year={1999},
volume={E82-A},
number={6},
pages={1002-1008},
abstract={This paper treats a fault detection/location of multi-processor systems, and we present a checking scheme based on Modified Processor-Data (MPD) graph with considering an error generation/propagation model for Algorithm-Based Fault Tolerant (ABFT) systems. The error propagation model considered here allows a computation result with multiple (more than one) erroneous inputs to be either erroneous or error-free. Also a basic algorithm for constructing checks for single-fault locatable/two-fault detectable ABFT systems based on the checking scheme is described with design examples.},
keywords={},
doi={},
ISSN={},
month={June},}
Salinan
TY - JOUR
TI - Checking Scheme for ABFT Systems Based on Modified PD Graph under an Error Generation/Propagation Model
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 1002
EP - 1008
AU - Choon-Sik PARK
AU - Mineo KANEKO
PY - 1999
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E82-A
IS - 6
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - June 1999
AB - This paper treats a fault detection/location of multi-processor systems, and we present a checking scheme based on Modified Processor-Data (MPD) graph with considering an error generation/propagation model for Algorithm-Based Fault Tolerant (ABFT) systems. The error propagation model considered here allows a computation result with multiple (more than one) erroneous inputs to be either erroneous or error-free. Also a basic algorithm for constructing checks for single-fault locatable/two-fault detectable ABFT systems based on the checking scheme is described with design examples.
ER -