The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Dalam kertas kerja ini, penyelesaian litar CMOS VLSI dicadangkan untuk pembelajaran pada cip dan penyimpanan berat, yang mudah dan cekap kawasan silikon. Khususnya skim pembelajaran stokastik, dinamakan Perubahan Berat Secara Rawak, dan pendekatan penyimpanan berat berbilang stabil telah dilaksanakan. Selain itu, masalah pengaruh variasi teknologi terhadap ketepatan pembelajaran dibincangkan. Walaupun kedua-dua skema pembelajaran dan penyimpanan berat adalah agak umum, dalam makalah ini kita akan merujuk kepada kelas rangkaian, yang dinamakan Rangkaian Neural Identiti Anggaran, yang amat sesuai untuk dilaksanakan dengan litar CMOS analog. Sebagai kenderaan ujian, rangkaian kecil dengan empat neuron, 16 pemberat, pembelajaran cip dan penyimpanan berat telah dibuat dalam proses CMOS dua logam 1.2 µm.
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Salinan
Massimo CONTI, Paolo CRIPPA, Giovanni GUAITINI, Simone ORCIONI, Claudio TURCHETTI, "An Analog CMOS Approximate Identity Neural Network with Stochastic Learning and Multilevel Weight Storage" in IEICE TRANSACTIONS on Fundamentals,
vol. E82-A, no. 7, pp. 1344-1357, July 1999, doi: .
Abstract: In this paper CMOS VLSI circuit solutions are suggested for on-chip learning and weight storage, which are simple and silicon area efficient. In particular a stochastic learning scheme, named Random Weight Change, and a multistable weight storage approach have been implemented. Additionally, the problems of the influence of technological variations on learning accuracy is discussed. Even though both the learning scheme and the weight storage are quite general, in the paper we will refer to a class of networks, named Approximate Identity Neural Networks, which are particularly suitable to be implemented with analog CMOS circuits. As a test vehicle a small network with four neurons, 16 weights, on chip learning and weight storage has been fabricated in a 1.2 µm double-metal CMOS process.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e82-a_7_1344/_p
Salinan
@ARTICLE{e82-a_7_1344,
author={Massimo CONTI, Paolo CRIPPA, Giovanni GUAITINI, Simone ORCIONI, Claudio TURCHETTI, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={An Analog CMOS Approximate Identity Neural Network with Stochastic Learning and Multilevel Weight Storage},
year={1999},
volume={E82-A},
number={7},
pages={1344-1357},
abstract={In this paper CMOS VLSI circuit solutions are suggested for on-chip learning and weight storage, which are simple and silicon area efficient. In particular a stochastic learning scheme, named Random Weight Change, and a multistable weight storage approach have been implemented. Additionally, the problems of the influence of technological variations on learning accuracy is discussed. Even though both the learning scheme and the weight storage are quite general, in the paper we will refer to a class of networks, named Approximate Identity Neural Networks, which are particularly suitable to be implemented with analog CMOS circuits. As a test vehicle a small network with four neurons, 16 weights, on chip learning and weight storage has been fabricated in a 1.2 µm double-metal CMOS process.},
keywords={},
doi={},
ISSN={},
month={July},}
Salinan
TY - JOUR
TI - An Analog CMOS Approximate Identity Neural Network with Stochastic Learning and Multilevel Weight Storage
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 1344
EP - 1357
AU - Massimo CONTI
AU - Paolo CRIPPA
AU - Giovanni GUAITINI
AU - Simone ORCIONI
AU - Claudio TURCHETTI
PY - 1999
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E82-A
IS - 7
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - July 1999
AB - In this paper CMOS VLSI circuit solutions are suggested for on-chip learning and weight storage, which are simple and silicon area efficient. In particular a stochastic learning scheme, named Random Weight Change, and a multistable weight storage approach have been implemented. Additionally, the problems of the influence of technological variations on learning accuracy is discussed. Even though both the learning scheme and the weight storage are quite general, in the paper we will refer to a class of networks, named Approximate Identity Neural Networks, which are particularly suitable to be implemented with analog CMOS circuits. As a test vehicle a small network with four neurons, 16 weights, on chip learning and weight storage has been fabricated in a 1.2 µm double-metal CMOS process.
ER -