The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Litar bersepadu digital (IC) moden sering direka dan direka oleh pihak ketiga dan alatan, yang boleh menjadikan reka bentuk/pembikinan IC terdedah kepada pengubahsuaian yang berniat jahat. Litar berniat jahat biasanya dirujuk sebagai Trojan perkakasan (HT) dan ia dianggap sebagai kebimbangan keselamatan yang serius. Dalam makalah ini, kami mencadangkan kaedah pengesanan dan pengelasan HT berasaskan ujian logik menggunakan pembelajaran keadaan mantap. Kami mula-mula memerhatikan bahawa HT disembunyikan semasa menggunakan corak ujian rawak dalam masa yang singkat tetapi kebanyakannya boleh diaktifkan dalam operasi litar rawak jangka panjang. Oleh itu, adalah wajar untuk kita belajar keadaan isyarat-peralihan yang mantap daripada setiap jaring Trojan yang mencurigakan dalam senarai bersih dengan melakukan simulasi rawak jangka pendek. Selepas itu, kami mensimulasikan atau meniru senarai bersih dalam masa yang sangat lama dengan memberikan corak ujian rawak dan mendapatkan satu set keadaan peralihan isyarat. Dengan menemui korelasi antara mereka, kaedah kami mengesan HT dan mengetahui kelakuannya. HT kadangkala tidak menjejaskan output utama tetapi hanya membocorkan maklumat melalui saluran sampingan. Kaedah kami boleh berjaya digunakan pada jenis HT tersebut. Keputusan eksperimen menunjukkan bahawa kaedah kami berjaya mengenal pasti semua jaring Trojan sebenar sebagai jaring Trojan dan semua jaring biasa menjadi jaring biasa, manakala kaedah pengesanan HT ujian logik lain yang sedia ada tidak dapat mengesan sebahagian daripadanya. Selain itu, kaedah kami boleh berjaya mengesan HT walaupun ia tidak benar-benar diaktifkan semasa simulasi rawak jangka panjang. Kaedah kami juga meneka dengan betul tingkah laku HT menggunakan pembelajaran peralihan isyarat.
Masaru OYA
Waseda University
Masao YANAGISAWA
Waseda University
Nozomu TOGAWA
Waseda University
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Salinan
Masaru OYA, Masao YANAGISAWA, Nozomu TOGAWA, "Hardware Trojan Detection and Classification Based on Logic Testing Utilizing Steady State Learning" in IEICE TRANSACTIONS on Fundamentals,
vol. E101-A, no. 12, pp. 2308-2319, December 2018, doi: 10.1587/transfun.E101.A.2308.
Abstract: Modern digital integrated circuits (ICs) are often designed and fabricated by third parties and tools, which can make IC design/fabrication vulnerable to malicious modifications. The malicious circuits are generally referred to as hardware Trojans (HTs) and they are considered to be a serious security concern. In this paper, we propose a logic-testing based HT detection and classification method utilizing steady state learning. We first observe that HTs are hidden while applying random test patterns in a short time but most of them can be activated in a very long-term random circuit operation. Hence it is very natural that we learn steady signal-transition states of every suspicious Trojan net in a netlist by performing short-term random simulation. After that, we simulate or emulate the netlist in a very long time by giving random test patterns and obtain a set of signal-transition states. By discovering correlation between them, our method detects HTs and finds out its behavior. HTs sometimes do not affect primary outputs but just leak information over side channels. Our method can be successfully applied to those types of HTs. Experimental results demonstrate that our method can successfully identify all the real Trojan nets to be Trojan nets and all the normal nets to be normal nets, while other existing logic-testing HT detection methods cannot detect some of them. Moreover, our method can successfully detect HTs even if they are not really activated during long-term random simulation. Our method also correctly guesses the HT behavior utilizing signal transition learning.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E101.A.2308/_p
Salinan
@ARTICLE{e101-a_12_2308,
author={Masaru OYA, Masao YANAGISAWA, Nozomu TOGAWA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Hardware Trojan Detection and Classification Based on Logic Testing Utilizing Steady State Learning},
year={2018},
volume={E101-A},
number={12},
pages={2308-2319},
abstract={Modern digital integrated circuits (ICs) are often designed and fabricated by third parties and tools, which can make IC design/fabrication vulnerable to malicious modifications. The malicious circuits are generally referred to as hardware Trojans (HTs) and they are considered to be a serious security concern. In this paper, we propose a logic-testing based HT detection and classification method utilizing steady state learning. We first observe that HTs are hidden while applying random test patterns in a short time but most of them can be activated in a very long-term random circuit operation. Hence it is very natural that we learn steady signal-transition states of every suspicious Trojan net in a netlist by performing short-term random simulation. After that, we simulate or emulate the netlist in a very long time by giving random test patterns and obtain a set of signal-transition states. By discovering correlation between them, our method detects HTs and finds out its behavior. HTs sometimes do not affect primary outputs but just leak information over side channels. Our method can be successfully applied to those types of HTs. Experimental results demonstrate that our method can successfully identify all the real Trojan nets to be Trojan nets and all the normal nets to be normal nets, while other existing logic-testing HT detection methods cannot detect some of them. Moreover, our method can successfully detect HTs even if they are not really activated during long-term random simulation. Our method also correctly guesses the HT behavior utilizing signal transition learning.},
keywords={},
doi={10.1587/transfun.E101.A.2308},
ISSN={1745-1337},
month={December},}
Salinan
TY - JOUR
TI - Hardware Trojan Detection and Classification Based on Logic Testing Utilizing Steady State Learning
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2308
EP - 2319
AU - Masaru OYA
AU - Masao YANAGISAWA
AU - Nozomu TOGAWA
PY - 2018
DO - 10.1587/transfun.E101.A.2308
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E101-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2018
AB - Modern digital integrated circuits (ICs) are often designed and fabricated by third parties and tools, which can make IC design/fabrication vulnerable to malicious modifications. The malicious circuits are generally referred to as hardware Trojans (HTs) and they are considered to be a serious security concern. In this paper, we propose a logic-testing based HT detection and classification method utilizing steady state learning. We first observe that HTs are hidden while applying random test patterns in a short time but most of them can be activated in a very long-term random circuit operation. Hence it is very natural that we learn steady signal-transition states of every suspicious Trojan net in a netlist by performing short-term random simulation. After that, we simulate or emulate the netlist in a very long time by giving random test patterns and obtain a set of signal-transition states. By discovering correlation between them, our method detects HTs and finds out its behavior. HTs sometimes do not affect primary outputs but just leak information over side channels. Our method can be successfully applied to those types of HTs. Experimental results demonstrate that our method can successfully identify all the real Trojan nets to be Trojan nets and all the normal nets to be normal nets, while other existing logic-testing HT detection methods cannot detect some of them. Moreover, our method can successfully detect HTs even if they are not really activated during long-term random simulation. Our method also correctly guesses the HT behavior utilizing signal transition learning.
ER -