The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Aplikasi grafik 3D digunakan secara meluas dalam elektronik pengguna yang merupakan kecenderungan yang tidak dapat dielakkan pada masa hadapan. Secara umum, tahap abstraksi yang lebih tinggi digunakan untuk memodelkan sistem yang kompleks seperti SoC grafik 3D. Walau bagaimanapun, isu yang dibimbangkan ialah cara menggunakan kaedah yang cekap untuk melintasi ruang reka bentuk secara hierarki, mengurangkan masa simulasi dan memperhalusi prestasi dengan pantas. Kertas kerja ini menunjukkan model penerokaan ruang reka bentuk peringkat sistem untuk pemurnian SoC grafik 3D berasaskan jubin. Model ini menggunakan alat UML yang boleh membantu pereka bentuk merentasi keseluruhan sistem dan mengurangkan masa simulasi secara mendadak dengan menggunakan SystemC. Hasilnya, prestasi sistem masing-masing meningkat 198% pada fungsi geometri dan 69% pada fungsi pemaparan.
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Salinan
Liang-Bi CHEN, Chi-Tsai YEH, Hung-Yu CHEN, Ing-Jer HUANG, "A System-Level Model of Design Space Exploration for a Tile-Based 3D Graphics SoC Refinement" in IEICE TRANSACTIONS on Fundamentals,
vol. E92-A, no. 12, pp. 3193-3202, December 2009, doi: 10.1587/transfun.E92.A.3193.
Abstract: 3D graphics application is widely used in consumer electronics which is an inevitable tendency in the future. In general, the higher abstraction level is used to model a complex system like 3D graphics SoC. However, the concerned issue is that how to use efficient methods to traverse design space hierarchically, reduce simulation time, and refine the performance fast. This paper demonstrates a system-level design space exploration model for a tile-based 3D graphics SoC refinement. This model uses UML tools which can assist designers to traverse the whole system and reduces simulation time dramatically by adopting SystemC. As a result, the system performance is improved 198% at geometry function and 69% at rendering function, respectively.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E92.A.3193/_p
Salinan
@ARTICLE{e92-a_12_3193,
author={Liang-Bi CHEN, Chi-Tsai YEH, Hung-Yu CHEN, Ing-Jer HUANG, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={A System-Level Model of Design Space Exploration for a Tile-Based 3D Graphics SoC Refinement},
year={2009},
volume={E92-A},
number={12},
pages={3193-3202},
abstract={3D graphics application is widely used in consumer electronics which is an inevitable tendency in the future. In general, the higher abstraction level is used to model a complex system like 3D graphics SoC. However, the concerned issue is that how to use efficient methods to traverse design space hierarchically, reduce simulation time, and refine the performance fast. This paper demonstrates a system-level design space exploration model for a tile-based 3D graphics SoC refinement. This model uses UML tools which can assist designers to traverse the whole system and reduces simulation time dramatically by adopting SystemC. As a result, the system performance is improved 198% at geometry function and 69% at rendering function, respectively.},
keywords={},
doi={10.1587/transfun.E92.A.3193},
ISSN={1745-1337},
month={December},}
Salinan
TY - JOUR
TI - A System-Level Model of Design Space Exploration for a Tile-Based 3D Graphics SoC Refinement
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 3193
EP - 3202
AU - Liang-Bi CHEN
AU - Chi-Tsai YEH
AU - Hung-Yu CHEN
AU - Ing-Jer HUANG
PY - 2009
DO - 10.1587/transfun.E92.A.3193
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E92-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2009
AB - 3D graphics application is widely used in consumer electronics which is an inevitable tendency in the future. In general, the higher abstraction level is used to model a complex system like 3D graphics SoC. However, the concerned issue is that how to use efficient methods to traverse design space hierarchically, reduce simulation time, and refine the performance fast. This paper demonstrates a system-level design space exploration model for a tile-based 3D graphics SoC refinement. This model uses UML tools which can assist designers to traverse the whole system and reduces simulation time dramatically by adopting SystemC. As a result, the system performance is improved 198% at geometry function and 69% at rendering function, respectively.
ER -