The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Kertas kerja ini memperkenalkan beberapa teknik untuk mencapai litar RF dan CMOS analog untuk sistem komunikasi wayarles di bawah bekalan voltan ultra-rendah, seperti 0.5 V. Pincang badan ke hadapan dan teknik litar berasaskan penyongsang telah digunakan dalam reka bentuk suapan hadapan Δ-ΣA/ D modulator beroperasi dengan bekalan 0.5 V. Penggunaan pengubah juga dipersembahkan sebagai teknik pengurangan kawasan induktor. Di samping itu, aplikasi resonans stokastik kepada penukaran A/D dibincangkan sebagai teknologi masa hadapan.
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Salinan
Toshimasa MATSUOKA, Jun WANG, Takao KIHARA, Hyunju HAM, Kenji TANIGUCHI, "Low-Voltage Wireless Analog CMOS Circuits toward 0.5 V Operation" in IEICE TRANSACTIONS on Fundamentals,
vol. E93-A, no. 2, pp. 356-366, February 2010, doi: 10.1587/transfun.E93.A.356.
Abstract: This paper introduces several techniques for achieving RF and analog CMOS circuits for wireless communication systems under ultra-low-voltage supply, such as 0.5 V. Forward body biasing and inverter-based circuit techniques were applied in the design of a feedforward Δ-ΣA/D modulator operating with a 0.5 V supply. Transformer utilization is also presented as an inductor area reduction technique. In addition, application of stochastic resonance to A/D conversion is discussed as a future technology.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E93.A.356/_p
Salinan
@ARTICLE{e93-a_2_356,
author={Toshimasa MATSUOKA, Jun WANG, Takao KIHARA, Hyunju HAM, Kenji TANIGUCHI, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Low-Voltage Wireless Analog CMOS Circuits toward 0.5 V Operation},
year={2010},
volume={E93-A},
number={2},
pages={356-366},
abstract={This paper introduces several techniques for achieving RF and analog CMOS circuits for wireless communication systems under ultra-low-voltage supply, such as 0.5 V. Forward body biasing and inverter-based circuit techniques were applied in the design of a feedforward Δ-ΣA/D modulator operating with a 0.5 V supply. Transformer utilization is also presented as an inductor area reduction technique. In addition, application of stochastic resonance to A/D conversion is discussed as a future technology.},
keywords={},
doi={10.1587/transfun.E93.A.356},
ISSN={1745-1337},
month={February},}
Salinan
TY - JOUR
TI - Low-Voltage Wireless Analog CMOS Circuits toward 0.5 V Operation
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 356
EP - 366
AU - Toshimasa MATSUOKA
AU - Jun WANG
AU - Takao KIHARA
AU - Hyunju HAM
AU - Kenji TANIGUCHI
PY - 2010
DO - 10.1587/transfun.E93.A.356
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E93-A
IS - 2
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - February 2010
AB - This paper introduces several techniques for achieving RF and analog CMOS circuits for wireless communication systems under ultra-low-voltage supply, such as 0.5 V. Forward body biasing and inverter-based circuit techniques were applied in the design of a feedforward Δ-ΣA/D modulator operating with a 0.5 V supply. Transformer utilization is also presented as an inductor area reduction technique. In addition, application of stochastic resonance to A/D conversion is discussed as a future technology.
ER -