The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Pertama, kami memberikan pemformalkan graf-teoretik untuk masalah tugasan ganti untuk dua kes konfigurasi semula N
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Salinan
Itsuo TAKANAMI, "A Graph-Theoretic Approach to Minimizing the Number of Dangerous Processors in Fault-Tolerant Mesh-Connected Processor Arrays" in IEICE TRANSACTIONS on Information,
vol. E84-D, no. 11, pp. 1462-1470, November 2001, doi: .
Abstract: First, we give a graph-theoretic formalization for the spare assignment problems for two cases of reconfiguring N
URL: https://global.ieice.org/en_transactions/information/10.1587/e84-d_11_1462/_p
Salinan
@ARTICLE{e84-d_11_1462,
author={Itsuo TAKANAMI, },
journal={IEICE TRANSACTIONS on Information},
title={A Graph-Theoretic Approach to Minimizing the Number of Dangerous Processors in Fault-Tolerant Mesh-Connected Processor Arrays},
year={2001},
volume={E84-D},
number={11},
pages={1462-1470},
abstract={First, we give a graph-theoretic formalization for the spare assignment problems for two cases of reconfiguring N
keywords={},
doi={},
ISSN={},
month={November},}
Salinan
TY - JOUR
TI - A Graph-Theoretic Approach to Minimizing the Number of Dangerous Processors in Fault-Tolerant Mesh-Connected Processor Arrays
T2 - IEICE TRANSACTIONS on Information
SP - 1462
EP - 1470
AU - Itsuo TAKANAMI
PY - 2001
DO -
JO - IEICE TRANSACTIONS on Information
SN -
VL - E84-D
IS - 11
JA - IEICE TRANSACTIONS on Information
Y1 - November 2001
AB - First, we give a graph-theoretic formalization for the spare assignment problems for two cases of reconfiguring N
ER -