The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Dalam VLSI berketumpatan tinggi dan berkuasa rendah baru-baru ini, berlakunya ralat lembut telah menjadi masalah yang ketara. Baru-baru ini, ralat lembut kerap berlaku pada bukan sahaja sistem ingatan tetapi juga litar logik. Berdasarkan pandangan ini, beberapa pembinaan FF tahan ralat lembut telah dicadangkan. FF konvensional terdiri daripada beberapa selak induk dan hamba serta elemen C. Dalam FF, denyutan ralat lembut yang berlaku pada bahagian gabungan litar logik dibetulkan selagi lebar denyutan adalah sempit, iaitu dalam lebar yang ditentukan. Walau bagaimanapun, denyutan ralat dengan lebar lebar tidak dikesan atau diperbetulkan dalam FF. Kertas kerja ini membentangkan pembinaan FF tahan ralat lembut dengan mengubah suai FF tahan ralat lembut konvensional. FF yang dicadangkan mempunyai keupayaan untuk mengesan denyutan ralat yang mempunyai lebar lebar serta keupayaan untuk membetulkan denyutan yang mempunyai lebar sempit. FF yang dicadangkan juga mampu mengesan ralat keras. Penilaian menunjukkan keupayaan tahan ralat lembut, ciri AC, overhed kawasan dan penggunaan kuasa FF.
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Salinan
Shuangyu RUAN, Kazuteru NAMBA, Hideo ITO, "Construction of Soft-Error-Tolerant FF with Wide Error Pulse Detecting Capability" in IEICE TRANSACTIONS on Information,
vol. E92-D, no. 8, pp. 1534-1541, August 2009, doi: 10.1587/transinf.E92.D.1534.
Abstract: In the recent high-density and low-power VLSIs, the occurrence of soft errors has become a significant problem. Recently, soft errors frequently occur on not only memory system but also logic circuits. Based on this standpoint, some constructions of soft-error-tolerant FFs were proposed. A conventional FF consists of some master and slave latches and C-elements. In the FF, soft error pulses occurring on combinational parts of logic circuits are corrected as long as the width of the pulses is narrow, that is within a specified width. However, error pulses with wide width are neither detected nor corrected in the FF. This paper presents a construction of soft-error-tolerant FFs by modifying the conventional soft-error-tolerant FF. The proposed FFs have the capability to detect error pulses having wide width as well as the capability to correct those having narrow width. The proposed FFs are also capable of detecting hard errors. The evaluation shows the soft-error-tolerant capability, AC characteristics, area overhead and power consumption of the FFs.
URL: https://global.ieice.org/en_transactions/information/10.1587/transinf.E92.D.1534/_p
Salinan
@ARTICLE{e92-d_8_1534,
author={Shuangyu RUAN, Kazuteru NAMBA, Hideo ITO, },
journal={IEICE TRANSACTIONS on Information},
title={Construction of Soft-Error-Tolerant FF with Wide Error Pulse Detecting Capability},
year={2009},
volume={E92-D},
number={8},
pages={1534-1541},
abstract={In the recent high-density and low-power VLSIs, the occurrence of soft errors has become a significant problem. Recently, soft errors frequently occur on not only memory system but also logic circuits. Based on this standpoint, some constructions of soft-error-tolerant FFs were proposed. A conventional FF consists of some master and slave latches and C-elements. In the FF, soft error pulses occurring on combinational parts of logic circuits are corrected as long as the width of the pulses is narrow, that is within a specified width. However, error pulses with wide width are neither detected nor corrected in the FF. This paper presents a construction of soft-error-tolerant FFs by modifying the conventional soft-error-tolerant FF. The proposed FFs have the capability to detect error pulses having wide width as well as the capability to correct those having narrow width. The proposed FFs are also capable of detecting hard errors. The evaluation shows the soft-error-tolerant capability, AC characteristics, area overhead and power consumption of the FFs.},
keywords={},
doi={10.1587/transinf.E92.D.1534},
ISSN={1745-1361},
month={August},}
Salinan
TY - JOUR
TI - Construction of Soft-Error-Tolerant FF with Wide Error Pulse Detecting Capability
T2 - IEICE TRANSACTIONS on Information
SP - 1534
EP - 1541
AU - Shuangyu RUAN
AU - Kazuteru NAMBA
AU - Hideo ITO
PY - 2009
DO - 10.1587/transinf.E92.D.1534
JO - IEICE TRANSACTIONS on Information
SN - 1745-1361
VL - E92-D
IS - 8
JA - IEICE TRANSACTIONS on Information
Y1 - August 2009
AB - In the recent high-density and low-power VLSIs, the occurrence of soft errors has become a significant problem. Recently, soft errors frequently occur on not only memory system but also logic circuits. Based on this standpoint, some constructions of soft-error-tolerant FFs were proposed. A conventional FF consists of some master and slave latches and C-elements. In the FF, soft error pulses occurring on combinational parts of logic circuits are corrected as long as the width of the pulses is narrow, that is within a specified width. However, error pulses with wide width are neither detected nor corrected in the FF. This paper presents a construction of soft-error-tolerant FFs by modifying the conventional soft-error-tolerant FF. The proposed FFs have the capability to detect error pulses having wide width as well as the capability to correct those having narrow width. The proposed FFs are also capable of detecting hard errors. The evaluation shows the soft-error-tolerant capability, AC characteristics, area overhead and power consumption of the FFs.
ER -